1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Code borrowed from the Linux driver
4 * Copyright (C) 2015 Broadcom Corporation
5 */
6
7 #include <asm/io.h>
8 #include <memalign.h>
9 #include <nand.h>
10 #include <linux/bitops.h>
11 #include <linux/err.h>
12 #include <linux/errno.h>
13 #include <linux/io.h>
14 #include <linux/ioport.h>
15 #include <dm.h>
16
17 #include "brcmnand.h"
18
19 struct iproc_nand_soc {
20 struct brcmnand_soc soc;
21 void __iomem *idm_base;
22 void __iomem *ext_base;
23 };
24
25 #define IPROC_NAND_CTLR_READY_OFFSET 0x10
26 #define IPROC_NAND_CTLR_READY BIT(0)
27
28 #define IPROC_NAND_IO_CTRL_OFFSET 0x00
29 #define IPROC_NAND_APB_LE_MODE BIT(24)
30 #define IPROC_NAND_INT_CTRL_READ_ENABLE BIT(6)
31
iproc_nand_intc_ack(struct brcmnand_soc * soc)32 static bool iproc_nand_intc_ack(struct brcmnand_soc *soc)
33 {
34 struct iproc_nand_soc *priv =
35 container_of(soc, struct iproc_nand_soc, soc);
36 void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET;
37 u32 val = brcmnand_readl(mmio);
38
39 if (val & IPROC_NAND_CTLR_READY) {
40 brcmnand_writel(IPROC_NAND_CTLR_READY, mmio);
41 return true;
42 }
43
44 return false;
45 }
46
iproc_nand_intc_set(struct brcmnand_soc * soc,bool en)47 static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en)
48 {
49 struct iproc_nand_soc *priv =
50 container_of(soc, struct iproc_nand_soc, soc);
51 void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET;
52 u32 val = brcmnand_readl(mmio);
53
54 if (en)
55 val |= IPROC_NAND_INT_CTRL_READ_ENABLE;
56 else
57 val &= ~IPROC_NAND_INT_CTRL_READ_ENABLE;
58
59 brcmnand_writel(val, mmio);
60 }
61
iproc_nand_apb_access(struct brcmnand_soc * soc,bool prepare,bool is_param)62 static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare,
63 bool is_param)
64 {
65 struct iproc_nand_soc *priv =
66 container_of(soc, struct iproc_nand_soc, soc);
67 void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET;
68 u32 val;
69
70 val = brcmnand_readl(mmio);
71
72 /*
73 * In the case of BE or when dealing with NAND data, always configure
74 * the APB bus to LE mode before accessing the FIFO and back to BE mode
75 * after the access is done
76 */
77 if (IS_ENABLED(CONFIG_SYS_BIG_ENDIAN) || !is_param) {
78 if (prepare)
79 val |= IPROC_NAND_APB_LE_MODE;
80 else
81 val &= ~IPROC_NAND_APB_LE_MODE;
82 } else { /* when in LE accessing the parameter page, keep APB in BE */
83 val &= ~IPROC_NAND_APB_LE_MODE;
84 }
85
86 brcmnand_writel(val, mmio);
87 }
88
iproc_nand_probe(struct udevice * dev)89 static int iproc_nand_probe(struct udevice *dev)
90 {
91 struct udevice *pdev = dev;
92 struct iproc_nand_soc *priv = dev_get_priv(dev);
93 struct brcmnand_soc *soc;
94 struct resource res;
95 int ret;
96
97 soc = &priv->soc;
98
99 ret = dev_read_resource_byname(pdev, "iproc-idm", &res);
100 if (ret)
101 return ret;
102
103 priv->idm_base = devm_ioremap(dev, res.start, resource_size(&res));
104 if (IS_ERR(priv->idm_base))
105 return PTR_ERR(priv->idm_base);
106
107 ret = dev_read_resource_byname(pdev, "iproc-ext", &res);
108 if (ret)
109 return ret;
110
111 priv->ext_base = devm_ioremap(dev, res.start, resource_size(&res));
112 if (IS_ERR(priv->ext_base))
113 return PTR_ERR(priv->ext_base);
114
115 soc->ctlrdy_ack = iproc_nand_intc_ack;
116 soc->ctlrdy_set_enabled = iproc_nand_intc_set;
117 soc->prepare_data_bus = iproc_nand_apb_access;
118
119 return brcmnand_probe(pdev, soc);
120 }
121
122 static const struct udevice_id iproc_nand_dt_ids[] = {
123 {
124 .compatible = "brcm,nand-iproc",
125 },
126 { /* sentinel */ }
127 };
128
129 U_BOOT_DRIVER(iproc_nand) = {
130 .name = "iproc-nand",
131 .id = UCLASS_MTD,
132 .of_match = iproc_nand_dt_ids,
133 .probe = iproc_nand_probe,
134 .priv_auto = sizeof(struct iproc_nand_soc),
135 };
136
board_nand_init(void)137 void board_nand_init(void)
138 {
139 struct udevice *dev;
140 int ret;
141
142 ret = uclass_get_device_by_driver(UCLASS_MTD,
143 DM_DRIVER_GET(iproc_nand), &dev);
144 if (ret && ret != -ENODEV)
145 pr_err("Failed to initialize %s. (error %d)\n", dev->name,
146 ret);
147 }
148