1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
4 */
5
6 #include <console.h>
7 #include <dm.h>
8 #include <errno.h>
9 #include <fdt_support.h>
10 #include <flash.h>
11 #include <log.h>
12 #include <asm/global_data.h>
13 #include <asm/io.h>
14 #include <linux/bitops.h>
15 #include <linux/mtd/mtd.h>
16
17 DECLARE_GLOBAL_DATA_PTR;
18
19 /* The STATUS register */
20 #define QUADSPI_SR_BP0 BIT(2)
21 #define QUADSPI_SR_BP1 BIT(3)
22 #define QUADSPI_SR_BP2 BIT(4)
23 #define QUADSPI_SR_BP2_0 GENMASK(4, 2)
24 #define QUADSPI_SR_BP3 BIT(6)
25 #define QUADSPI_SR_TB BIT(5)
26
27 /*
28 * The QUADSPI_MEM_OP register is used to do memory protect and erase operations
29 */
30 #define QUADSPI_MEM_OP_BULK_ERASE 0x00000001
31 #define QUADSPI_MEM_OP_SECTOR_ERASE 0x00000002
32 #define QUADSPI_MEM_OP_SECTOR_PROTECT 0x00000003
33
34 /*
35 * The QUADSPI_ISR register is used to determine whether an invalid write or
36 * erase operation trigerred an interrupt
37 */
38 #define QUADSPI_ISR_ILLEGAL_ERASE BIT(0)
39 #define QUADSPI_ISR_ILLEGAL_WRITE BIT(1)
40
41 struct altera_qspi_regs {
42 u32 rd_status;
43 u32 rd_sid;
44 u32 rd_rdid;
45 u32 mem_op;
46 u32 isr;
47 u32 imr;
48 u32 chip_select;
49 };
50
51 struct altera_qspi_plat {
52 struct altera_qspi_regs *regs;
53 void *base;
54 unsigned long size;
55 };
56
57 static uint flash_verbose;
58 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* FLASH chips info */
59
60 static void altera_qspi_get_locked_range(struct mtd_info *mtd, loff_t *ofs,
61 uint64_t *len);
62
flash_print_info(flash_info_t * info)63 void flash_print_info(flash_info_t *info)
64 {
65 struct mtd_info *mtd = info->mtd;
66 loff_t ofs;
67 u64 len;
68
69 printf("Altera QSPI flash Size: %ld MB in %d Sectors\n",
70 info->size >> 20, info->sector_count);
71 altera_qspi_get_locked_range(mtd, &ofs, &len);
72 printf(" %08lX +%lX", info->start[0], info->size);
73 if (len) {
74 printf(", protected %08llX +%llX",
75 info->start[0] + ofs, len);
76 }
77 putc('\n');
78 }
79
flash_set_verbose(uint v)80 void flash_set_verbose(uint v)
81 {
82 flash_verbose = v;
83 }
84
flash_erase(flash_info_t * info,int s_first,int s_last)85 int flash_erase(flash_info_t *info, int s_first, int s_last)
86 {
87 struct mtd_info *mtd = info->mtd;
88 struct erase_info instr;
89 int ret;
90
91 memset(&instr, 0, sizeof(instr));
92 instr.mtd = mtd;
93 instr.addr = mtd->erasesize * s_first;
94 instr.len = mtd->erasesize * (s_last + 1 - s_first);
95 flash_set_verbose(1);
96 ret = mtd_erase(mtd, &instr);
97 flash_set_verbose(0);
98 if (ret)
99 return FL_ERR_PROTECTED;
100
101 puts(" done\n");
102 return 0;
103 }
104
write_buff(flash_info_t * info,uchar * src,ulong addr,ulong cnt)105 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
106 {
107 struct mtd_info *mtd = info->mtd;
108 struct udevice *dev = mtd->dev;
109 struct altera_qspi_plat *pdata = dev_get_plat(dev);
110 ulong base = (ulong)pdata->base;
111 loff_t to = addr - base;
112 size_t retlen;
113 int ret;
114
115 ret = mtd_write(mtd, to, cnt, &retlen, src);
116 if (ret)
117 return FL_ERR_PROTECTED;
118
119 return 0;
120 }
121
flash_init(void)122 unsigned long flash_init(void)
123 {
124 struct udevice *dev;
125
126 /* probe every MTD device */
127 for (uclass_first_device(UCLASS_MTD, &dev);
128 dev;
129 uclass_next_device(&dev)) {
130 }
131
132 return flash_info[0].size;
133 }
134
altera_qspi_erase(struct mtd_info * mtd,struct erase_info * instr)135 static int altera_qspi_erase(struct mtd_info *mtd, struct erase_info *instr)
136 {
137 struct udevice *dev = mtd->dev;
138 struct altera_qspi_plat *pdata = dev_get_plat(dev);
139 struct altera_qspi_regs *regs = pdata->regs;
140 size_t addr = instr->addr;
141 size_t len = instr->len;
142 size_t end = addr + len;
143 u32 sect;
144 u32 stat;
145 u32 *flash, *last;
146
147 instr->state = MTD_ERASING;
148 addr &= ~(mtd->erasesize - 1); /* get lower aligned address */
149 while (addr < end) {
150 if (ctrlc()) {
151 if (flash_verbose)
152 putc('\n');
153 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
154 instr->state = MTD_ERASE_FAILED;
155 return -EIO;
156 }
157 flash = pdata->base + addr;
158 last = pdata->base + addr + mtd->erasesize;
159 /* skip erase if sector is blank */
160 while (flash < last) {
161 if (readl(flash) != 0xffffffff)
162 break;
163 flash++;
164 }
165 if (flash < last) {
166 sect = addr / mtd->erasesize;
167 sect <<= 8;
168 sect |= QUADSPI_MEM_OP_SECTOR_ERASE;
169 debug("erase %08x\n", sect);
170 writel(sect, ®s->mem_op);
171 stat = readl(®s->isr);
172 if (stat & QUADSPI_ISR_ILLEGAL_ERASE) {
173 /* erase failed, sector might be protected */
174 debug("erase %08x fail %x\n", sect, stat);
175 writel(stat, ®s->isr); /* clear isr */
176 instr->fail_addr = addr;
177 instr->state = MTD_ERASE_FAILED;
178 return -EIO;
179 }
180 if (flash_verbose)
181 putc('.');
182 } else {
183 if (flash_verbose)
184 putc(',');
185 }
186 addr += mtd->erasesize;
187 }
188 instr->state = MTD_ERASE_DONE;
189
190 return 0;
191 }
192
altera_qspi_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)193 static int altera_qspi_read(struct mtd_info *mtd, loff_t from, size_t len,
194 size_t *retlen, u_char *buf)
195 {
196 struct udevice *dev = mtd->dev;
197 struct altera_qspi_plat *pdata = dev_get_plat(dev);
198
199 memcpy_fromio(buf, pdata->base + from, len);
200 *retlen = len;
201
202 return 0;
203 }
204
altera_qspi_write(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)205 static int altera_qspi_write(struct mtd_info *mtd, loff_t to, size_t len,
206 size_t *retlen, const u_char *buf)
207 {
208 struct udevice *dev = mtd->dev;
209 struct altera_qspi_plat *pdata = dev_get_plat(dev);
210 struct altera_qspi_regs *regs = pdata->regs;
211 u32 stat;
212
213 memcpy_toio(pdata->base + to, buf, len);
214 /* check whether write triggered a illegal write interrupt */
215 stat = readl(®s->isr);
216 if (stat & QUADSPI_ISR_ILLEGAL_WRITE) {
217 /* write failed, sector might be protected */
218 debug("write fail %x\n", stat);
219 writel(stat, ®s->isr); /* clear isr */
220 return -EIO;
221 }
222 *retlen = len;
223
224 return 0;
225 }
226
altera_qspi_sync(struct mtd_info * mtd)227 static void altera_qspi_sync(struct mtd_info *mtd)
228 {
229 }
230
altera_qspi_get_locked_range(struct mtd_info * mtd,loff_t * ofs,uint64_t * len)231 static void altera_qspi_get_locked_range(struct mtd_info *mtd, loff_t *ofs,
232 uint64_t *len)
233 {
234 struct udevice *dev = mtd->dev;
235 struct altera_qspi_plat *pdata = dev_get_plat(dev);
236 struct altera_qspi_regs *regs = pdata->regs;
237 int shift0 = ffs(QUADSPI_SR_BP2_0) - 1;
238 int shift3 = ffs(QUADSPI_SR_BP3) - 1 - 3;
239 u32 stat = readl(®s->rd_status);
240 unsigned pow = ((stat & QUADSPI_SR_BP2_0) >> shift0) |
241 ((stat & QUADSPI_SR_BP3) >> shift3);
242
243 *ofs = 0;
244 *len = 0;
245 if (pow) {
246 *len = mtd->erasesize << (pow - 1);
247 if (*len > mtd->size)
248 *len = mtd->size;
249 if (!(stat & QUADSPI_SR_TB))
250 *ofs = mtd->size - *len;
251 }
252 }
253
altera_qspi_lock(struct mtd_info * mtd,loff_t ofs,uint64_t len)254 static int altera_qspi_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
255 {
256 struct udevice *dev = mtd->dev;
257 struct altera_qspi_plat *pdata = dev_get_plat(dev);
258 struct altera_qspi_regs *regs = pdata->regs;
259 u32 sector_start, sector_end;
260 u32 num_sectors;
261 u32 mem_op;
262 u32 sr_bp;
263 u32 sr_tb;
264
265 num_sectors = mtd->size / mtd->erasesize;
266 sector_start = ofs / mtd->erasesize;
267 sector_end = (ofs + len) / mtd->erasesize;
268
269 if (sector_start >= num_sectors / 2) {
270 sr_bp = fls(num_sectors - 1 - sector_start) + 1;
271 sr_tb = 0;
272 } else if (sector_end < num_sectors / 2) {
273 sr_bp = fls(sector_end) + 1;
274 sr_tb = 1;
275 } else {
276 sr_bp = 15;
277 sr_tb = 0;
278 }
279
280 mem_op = (sr_tb << 12) | (sr_bp << 8);
281 mem_op |= QUADSPI_MEM_OP_SECTOR_PROTECT;
282 debug("lock %08x\n", mem_op);
283 writel(mem_op, ®s->mem_op);
284
285 return 0;
286 }
287
altera_qspi_unlock(struct mtd_info * mtd,loff_t ofs,uint64_t len)288 static int altera_qspi_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
289 {
290 struct udevice *dev = mtd->dev;
291 struct altera_qspi_plat *pdata = dev_get_plat(dev);
292 struct altera_qspi_regs *regs = pdata->regs;
293 u32 mem_op;
294
295 mem_op = QUADSPI_MEM_OP_SECTOR_PROTECT;
296 debug("unlock %08x\n", mem_op);
297 writel(mem_op, ®s->mem_op);
298
299 return 0;
300 }
301
altera_qspi_probe(struct udevice * dev)302 static int altera_qspi_probe(struct udevice *dev)
303 {
304 struct altera_qspi_plat *pdata = dev_get_plat(dev);
305 struct altera_qspi_regs *regs = pdata->regs;
306 unsigned long base = (unsigned long)pdata->base;
307 struct mtd_info *mtd;
308 flash_info_t *flash = &flash_info[0];
309 u32 rdid;
310 int i;
311
312 rdid = readl(®s->rd_rdid);
313 debug("rdid %x\n", rdid);
314
315 mtd = dev_get_uclass_priv(dev);
316 mtd->dev = dev;
317 mtd->name = "nor0";
318 mtd->type = MTD_NORFLASH;
319 mtd->flags = MTD_CAP_NORFLASH;
320 mtd->size = 1 << ((rdid & 0xff) - 6);
321 mtd->writesize = 1;
322 mtd->writebufsize = mtd->writesize;
323 mtd->_erase = altera_qspi_erase;
324 mtd->_read = altera_qspi_read;
325 mtd->_write = altera_qspi_write;
326 mtd->_sync = altera_qspi_sync;
327 mtd->_lock = altera_qspi_lock;
328 mtd->_unlock = altera_qspi_unlock;
329 mtd->numeraseregions = 0;
330 mtd->erasesize = 0x10000;
331 if (add_mtd_device(mtd))
332 return -ENOMEM;
333
334 flash->mtd = mtd;
335 flash->size = mtd->size;
336 flash->sector_count = mtd->size / mtd->erasesize;
337 flash->flash_id = rdid;
338 flash->start[0] = base;
339 for (i = 1; i < flash->sector_count; i++)
340 flash->start[i] = flash->start[i - 1] + mtd->erasesize;
341 gd->bd->bi_flashstart = base;
342
343 return 0;
344 }
345
altera_qspi_of_to_plat(struct udevice * dev)346 static int altera_qspi_of_to_plat(struct udevice *dev)
347 {
348 struct altera_qspi_plat *pdata = dev_get_plat(dev);
349 void *blob = (void *)gd->fdt_blob;
350 int node = dev_of_offset(dev);
351 const char *list, *end;
352 const fdt32_t *cell;
353 void *base;
354 unsigned long addr, size;
355 int parent, addrc, sizec;
356 int len, idx;
357
358 /*
359 * decode regs. there are multiple reg tuples, and they need to
360 * match with reg-names.
361 */
362 parent = fdt_parent_offset(blob, node);
363 fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
364 list = fdt_getprop(blob, node, "reg-names", &len);
365 if (!list)
366 return -ENOENT;
367 end = list + len;
368 cell = fdt_getprop(blob, node, "reg", &len);
369 if (!cell)
370 return -ENOENT;
371 idx = 0;
372 while (list < end) {
373 addr = fdt_translate_address((void *)blob,
374 node, cell + idx);
375 size = fdt_addr_to_cpu(cell[idx + addrc]);
376 base = map_physmem(addr, size, MAP_NOCACHE);
377 len = strlen(list);
378 if (strcmp(list, "avl_csr") == 0) {
379 pdata->regs = base;
380 } else if (strcmp(list, "avl_mem") == 0) {
381 pdata->base = base;
382 pdata->size = size;
383 }
384 idx += addrc + sizec;
385 list += (len + 1);
386 }
387
388 return 0;
389 }
390
391 static const struct udevice_id altera_qspi_ids[] = {
392 { .compatible = "altr,quadspi-1.0" },
393 {}
394 };
395
396 U_BOOT_DRIVER(altera_qspi) = {
397 .name = "altera_qspi",
398 .id = UCLASS_MTD,
399 .of_match = altera_qspi_ids,
400 .of_to_plat = altera_qspi_of_to_plat,
401 .plat_auto = sizeof(struct altera_qspi_plat),
402 .probe = altera_qspi_probe,
403 };
404