AIPS1_BASE_ADDR (reference) in projects: arch - OpenGrok search results

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Searched refs:AIPS1_BASE_ADDR (Results 1 – 6 of 6) sorted by relevance

/arch/arm/include/asm/arch-mx5/
A D	imx-regs.h	16 #define AIPS1_BASE_ADDR 0x73F00000 macro 26 #define AIPS1_BASE_ADDR 0x53F00000 macro 59 #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) 64 #define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) 67 #define GPT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) 68 #define SRTC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) 74 #define UART1_BASE (AIPS1_BASE_ADDR + 0x000BC000) 75 #define UART2_BASE (AIPS1_BASE_ADDR + 0x000C0000) 76 #define SRC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D0000) 77 #define CCM_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D4000) [all …]
/arch/arm/include/asm/arch-vf610/
A D	imx-regs.h	15 #define AIPS1_BASE_ADDR 0x40080000 macro 94 #define OCOTP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00025000) 95 #define DDR_BASE_ADDR (AIPS1_BASE_ADDR + 0x0002E000) 96 #define ESDHC0_BASE_ADDR (AIPS1_BASE_ADDR + 0x00031000) 97 #define ESDHC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00032000) 98 #define USBC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00034000) 99 #define ENET_BASE_ADDR (AIPS1_BASE_ADDR + 0x00050000) 100 #define ENET1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00051000) 101 #define DCU1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00058000) 102 #define NFC_BASE_ADDR (AIPS1_BASE_ADDR + 0x00060000)
/arch/arm/mach-imx/
A D	init.c	`17 aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; in init_aips()`
/arch/arm/mach-imx/mx5/
A D	lowlevel_init.S	`62 ldr r0, =AIPS1_BASE_ADDR`
/arch/arm/include/asm/arch-mx6/
A D	imx-regs.h	`134 #define AIPS1_BASE_ADDR AIPS1_ON_BASE_ADDR macro`
/arch/arm/include/asm/arch-mx7/
A D	imx-regs.h	`200 #define AIPS1_BASE_ADDR AIPS1_ON_BASE_ADDR macro`

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