Searched refs:CLK_SRC_LEFTBUS_VAL (Results 1 – 2 of 2) sorted by relevance
| /arch/arm/mach-exynos/ | ||
| A D | clock_init_exynos4.c | 50 writel(CLK_SRC_LEFTBUS_VAL, &clk->src_leftbus); in system_clock_init() |
| A D | exynos4_setup.h | 141 #define CLK_SRC_LEFTBUS_VAL (MUX_GDL_SEL_SCLKMPLL) macro |
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