Home
last modified time | relevance | path

Searched refs:CSITE_CPU_DBG2_LAR (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-tegra/
A Dcpu.h42 #define CSITE_CPU_DBG2_LAR (NV_PA_CSITE_BASE + 0x14FB0) macro
A Dcpu.c443 writel(rst, CSITE_CPU_DBG2_LAR); in clock_enable_coresight()

Completed in 4 milliseconds