IRTL_VALID (reference) in projects: arch

Searched refs:IRTL_VALID (Results 1 – 4 of 4) sorted by relevance

/arch/x86/cpu/broadwell/
A D	cpu_full.c	442 msr.lo = IRTL_VALID \| IRTL_1024_NS \| C_STATE_LATENCY_CONTROL_0_LIMIT; in configure_c_states() 447 msr.lo = IRTL_VALID \| IRTL_1024_NS \| C_STATE_LATENCY_CONTROL_1_LIMIT; in configure_c_states() 452 msr.lo = IRTL_VALID \| IRTL_1024_NS \| C_STATE_LATENCY_CONTROL_2_LIMIT; in configure_c_states() 457 msr.lo = IRTL_VALID \| IRTL_1024_NS \| C_STATE_LATENCY_CONTROL_3_LIMIT; in configure_c_states() 462 msr.lo = IRTL_VALID \| IRTL_1024_NS \| C_STATE_LATENCY_CONTROL_4_LIMIT; in configure_c_states() 467 msr.lo = IRTL_VALID \| IRTL_1024_NS \| C_STATE_LATENCY_CONTROL_5_LIMIT; in configure_c_states()
/arch/x86/include/asm/arch-ivybridge/
A D	model_206ax.h	`32 #define IRTL_VALID (1 << 15) macro`
/arch/x86/cpu/ivybridge/
A D	model_206ax.c	`254 msr.lo = IRTL_VALID \| IRTL_1024_NS \| 0x50; in configure_c_states() 259 msr.lo = IRTL_VALID \| IRTL_1024_NS \| 0x68; in configure_c_states() 264 msr.lo = IRTL_VALID \| IRTL_1024_NS \| 0x6D; in configure_c_states()`
/arch/x86/include/asm/
A D	msr-index.h	`248 #define IRTL_VALID (1 << 15) macro`

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