Home
last modified time | relevance | path

Searched refs:PLL_LOCK (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-omap2/omap3/
A Dclock.c189 0x00000007, PLL_LOCK); in dpll3_init_34xx()
280 clrsetbits_le32(&prcm_base->clken_pll, 0x00070000, PLL_LOCK << 16); in dpll4_init_34xx()
304 clrsetbits_le32(&prcm_base->clken2_pll, 0x00000007, PLL_LOCK); in dpll5_init_34xx()
367 0x00000007, PLL_LOCK); in iva_init_34xx()
439 0x00000007, PLL_LOCK); in dpll3_init_36xx()
520 clrsetbits_le32(&prcm_base->clken_pll, 0x00070000, PLL_LOCK << 16); in dpll4_init_36xx()
542 clrsetbits_le32(&prcm_base->clken2_pll, 0x00000007, PLL_LOCK); in dpll5_init_36xx()
589 clrsetbits_le32(&prcm_base->clken_pll_iva2, 0x00000007, PLL_LOCK); in iva_init_36xx()
658 0x00000007, PLL_LOCK); in prcm_init()
690 0x00000007, PLL_LOCK); in prcm_init()
/arch/arm/include/asm/arch-omap3/
A Dclocks_omap3.h13 #define PLL_LOCK 7 /* MPU, IVA, CORE & PER */ macro
/arch/arm/include/asm/arch-rockchip/
A Dedp_rk3288.h397 #define PLL_LOCK (0x1 << 4) macro
/arch/arm/mach-exynos/include/mach/
A Ddp.h306 #define PLL_LOCK (0x1 << 4) macro

Completed in 13 milliseconds