Home
last modified time | relevance | path

Searched refs:STM32_PWR_BASE (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-stm32mp/stm32mp1/
A Dstm32mp15x.c48 #define PWR_CR1 (STM32_PWR_BASE + 0x00)
49 #define PWR_MCUCR (STM32_PWR_BASE + 0x14)
A Dpsci.c534 setbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRRETEN); in ddr_sw_self_refresh_in()
655 clrbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRRETEN); in ddr_sw_self_refresh_exit()
732 setbits_le32(STM32_PWR_BASE + PWR_MPUCR, in psci_system_suspend()
743 setbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRSREN); in psci_system_suspend()
A Dstm32mp13x.c51 #define PWR_CR1 (STM32_PWR_BASE + 0x00)
/arch/arm/mach-stm32mp/include/mach/
A Dstm32.h79 #define STM32_PWR_BASE 0x50001000 macro

Completed in 7 milliseconds