Searched refs:c5 (Results 1 – 6 of 6) sorted by relevance
| /arch/arm/mach-mvebu/ |
| A D | lowlevel.S | 24 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
25 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
27 mcr p15, 0, r0, c7, c5, 4 @ ISB
|
| /arch/arm/mach-imx/mx7/ |
| A D | psci-suspend.S | 57 mcr p15, 0, r6, c7, c5, 0
58 mcr p15, 0, r6, c7, c5, 6
|
| /arch/arm/cpu/arm946es/ |
| A D | start.S | 79 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
|
| /arch/arm/cpu/arm926ejs/ |
| A D | start.S | 88 mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */
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| /arch/m68k/include/asm/coldfire/ |
| A D | skha.h | 35 u32 c5; /* 0x80 Context 5 */ member
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| /arch/arm/cpu/armv7/ |
| A D | start.S | 136 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
220 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
221 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
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