Home
last modified time | relevance | path

Searched refs:cpu_ddr_control_set (Results 1 – 1 of 1) sorted by relevance

/arch/mips/mach-ath79/qca956x/
A Dclk.c198 #define cpu_ddr_control_set(_mask, _val) \ macro
247 cpu_ddr_control_set(CPU_DDR_CLOCK_CONTROL_CPU_PLL_BYPASS_MASK, in qca956x_pll_init()
249 cpu_ddr_control_set(CPU_DDR_CLOCK_CONTROL_DDR_PLL_BYPASS_MASK, in qca956x_pll_init()
251 cpu_ddr_control_set(CPU_DDR_CLOCK_CONTROL_AHB_PLL_BYPASS_MASK, in qca956x_pll_init()
295 cpu_ddr_control_set(CPU_DDR_CLOCK_CONTROL_CPU_PLL_BYPASS_MASK, in qca956x_pll_init()
297 cpu_ddr_control_set(CPU_DDR_CLOCK_CONTROL_DDR_PLL_BYPASS_MASK, in qca956x_pll_init()
299 cpu_ddr_control_set(CPU_DDR_CLOCK_CONTROL_AHB_PLL_BYPASS_MASK, in qca956x_pll_init()

Completed in 3 milliseconds