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Searched refs:input_rate (Results 1 – 2 of 2) sorted by relevance

/arch/arm/include/asm/arch-rockchip/
A Dclock.h166 static inline u32 clk_get_divisor(ulong input_rate, uint output_rate) in clk_get_divisor() argument
170 clk_div = input_rate / output_rate; in clk_get_divisor()
/arch/arm/mach-exynos/
A Dclock.c1411 unsigned int fine_scalar_bits, unsigned int input_rate, in clock_calc_best_scalar() argument
1420 debug("Input Rate is %u, Target is %u, Cap is %u\n", input_rate, in clock_calc_best_scalar()
1428 if (input_rate == 0 || target_rate == 0) in clock_calc_best_scalar()
1431 if (target_rate >= input_rate) in clock_calc_best_scalar()
1436 max(min(input_rate / i / target_rate, cap), 1U); in clock_calc_best_scalar()
1437 const unsigned int effective_rate = input_rate / i / in clock_calc_best_scalar()

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