Searched refs:refdiv (Results 1 – 15 of 15) sorted by relevance
| /arch/mips/mach-ath79/ar934x/ |
| A D | clk.c | 36 u8 refdiv; member
149 pll_refdiv = pll_cfg->refdiv; in ar934x_pll_init()
158 pll_refdiv = pll_cfg->refdiv; in ar934x_pll_init()
237 const u32 refdiv = (regval >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & in ar934x_cpupll_to_hz() local
245 return (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); in ar934x_cpupll_to_hz()
252 const u32 refdiv = (regval >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & in ar934x_ddrpll_to_hz() local
260 return (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); in ar934x_ddrpll_to_hz()
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| /arch/arm/mach-socfpga/ |
| A D | clock_manager_s10.c | 201 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_main_vco_clk_hz() local
219 refdiv = (reg >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & in cm_get_main_vco_clk_hz()
225 vco = fref / refdiv; in cm_get_main_vco_clk_hz()
232 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_per_vco_clk_hz() local
250 refdiv = (reg >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & in cm_get_per_vco_clk_hz()
256 vco = fref / refdiv; in cm_get_per_vco_clk_hz()
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| /arch/arm/include/asm/arch-rockchip/ |
| A D | clock.h | 75 .refdiv = _refdiv, \
99 unsigned int refdiv; member
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| A D | cru_rk3036.h | 59 u32 refdiv; member
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| A D | cru_rk322x.h | 60 u32 refdiv; member
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| A D | cru_rk3128.h | 66 u32 refdiv; member
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| A D | cru_rv1108.h | 56 u32 refdiv; member
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| A D | cru_rk3528.h | 101 unsigned int refdiv; member
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| A D | cru_rv1126.h | 141 unsigned int refdiv; member
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| A D | cru_px30.h | 104 unsigned int refdiv; member
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| A D | cru_rk3568.h | 118 unsigned int refdiv; member
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| /arch/m68k/cpu/mcf532x/ |
| A D | speed.c | 69 u32 refdiv = (1 << ((in_be32(&pll->pcr) & PLL_PCR_REFDIV(7)) >> 8)); in get_sys_clock() local
72 return (((FREF * pfdr) / refdiv) / busdiv); in get_sys_clock()
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| /arch/mips/mach-ath79/ar933x/ |
| A D | lowlevel_init.S | 19 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
21 ((0x1F & refdiv) << 16) | \
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| /arch/mips/mach-ath79/qca953x/ |
| A D | lowlevel_init.S | 14 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
16 ((0x1F & refdiv) << 16) | \
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| /arch/arm/mach-rockchip/rk3036/ |
| A D | sdram_rk3036.c | 344 dpll_init_cfg.refdiv << PLL_REFDIV_SHIFT)); in rkdclk_init()
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