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Searched refs:reg_offset (Results 1 – 11 of 11) sorted by relevance

/arch/powerpc/include/asm/
A Dfsl_liodn.h16 unsigned long reg_offset[2]; member
22 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
28 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
30 .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
36 .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
46 unsigned long reg_offset; member
58 unsigned long reg_offset; member
75 .reg_offset = off + CFG_SYS_CCSRBAR, \
82 .reg_offset = off + CFG_SYS_CCSRBAR, \
89 .reg_offset = off + CFG_SYS_CCSRBAR, \
/arch/arm/include/asm/arch-rockchip/
A Dclock.h205 int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number);
216 u32 reg_offset, u32 reg_number);
226 int rk3528_reset_bind_lut(struct udevice *pdev, u32 reg_offset, u32 reg_number);
236 int rk3576_reset_bind_lut(struct udevice *pdev, u32 reg_offset, u32 reg_number);
246 int rk3588_reset_bind_lut(struct udevice *pdev, u32 reg_offset, u32 reg_number);
/arch/arm/mach-omap2/am33xx/
A Dmux.c30 for (i = 0; mod_pin_mux[i].reg_offset != -1; i++) in configure_module_pin_mux()
31 MUX_CFG(mod_pin_mux[i].val, mod_pin_mux[i].reg_offset); in configure_module_pin_mux()
/arch/arm/include/asm/arch-ls102xa/
A Dls102xa_stream_id.h14 .reg_offset = off + CONFIG_SYS_IMMR, \
21 .reg_offset = off + CONFIG_SYS_IMMR, \
62 unsigned long reg_offset; member
/arch/arm/mach-stm32mp/stm32mp1/
A Detzpc.c64 u32 reg_offset, offset, sec_val; in etzpc_check_access() local
67 reg_offset = ETZPC_DECPROT + 0x4 * (id / IDS_PER_DECPROT_REGS); in etzpc_check_access()
71 sec_val = (readl(base + reg_offset) >> offset) & ETZPC_PROT_MASK; in etzpc_check_access()
74 reg_offset, sec_val); in etzpc_check_access()
/arch/powerpc/cpu/mpc85xx/
A Dliodn.c33 unsigned long reg_off = tbl[i].reg_offset[0]; in set_srio_liodn()
37 reg_off = tbl[i].reg_offset[1]; in set_srio_liodn()
56 out_be32((volatile u32 *)(tbl[i].reg_offset), liodn); in set_liodn()
72 out_be32((volatile u32 *)(tbl[i].reg_offset), liodn); in set_fman_liodn()
164 out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]); in set_rman_liodn()
/arch/arm/include/asm/arch-am33xx/
A Dmux.h28 short reg_offset; member
/arch/arm/mach-stm32mp/stm32mp2/
A Drifsc.c133 u32 reg_offset, reg_id, sec_reg_value, cid_reg_value, sem_reg_value; in rifsc_check_access() local
141 reg_offset = id % IDS_PER_RISC_SEC_PRIV_REGS; in rifsc_check_access()
182 if (sec_reg_value & BIT(reg_offset)) { in rifsc_check_access()
/arch/x86/cpu/apollolake/
A Duart.c109 ns.reg_offset = 0; in apl_ns16550_of_to_plat()
/arch/mips/mach-octeon/include/mach/
A Dcvmx-helper-gpio.h194 int reg_offset; /** Base register address for GPIO */ member
A Dcvmx-helper-board.h225 int reg_offset; /** Offset for this slice */ member

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