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Searched refs:src_mau (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-exynos/
A Dclock.c392 src = readl(&clk->src_mau); in exynos5_get_periph_rate()
1329 clrsetbits_le32(&clk->src_mau, EXYNOS5420_AUDIO0_SEL_MASK, in exynos5420_set_i2s_clk_source()
1344 clrsetbits_le32(&clk->src_mau, AUDIO0_SEL_MASK, in exynos5_set_i2s_clk_source()
A Dclock_init_exynos5.c935 writel(AUDIO0_SEL_EPLL, &clk->src_mau); in exynos5420_system_clock_init()
/arch/arm/mach-exynos/include/mach/
A Dclock.h683 unsigned int src_mau; member
1082 unsigned int src_mau; member

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