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Searched refs:read_data (Results 1 – 17 of 17) sorted by relevance

/drivers/ddr/marvell/a38x/old/
A Dddr3_training_bist.c38 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_bist_activate() local
97 read_data, in ddr3_tip_bist_activate()
99 val = read_data[i]; in ddr3_tip_bist_activate()
143 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_bist_read_result() local
152 ODPG_BIST_FAILED_DATA_HI_REG, read_data, in ddr3_tip_bist_read_result()
156 pst_bist_result->bist_fail_high = read_data[if_id]; in ddr3_tip_bist_read_result()
158 ODPG_BIST_FAILED_DATA_LOW_REG, read_data, in ddr3_tip_bist_read_result()
162 pst_bist_result->bist_fail_low = read_data[if_id]; in ddr3_tip_bist_read_result()
165 ODPG_BIST_LAST_FAIL_ADDR_REG, read_data, in ddr3_tip_bist_read_result()
171 ODPG_BIST_DATA_ERROR_COUNTER_REG, read_data, in ddr3_tip_bist_read_result()
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A Dddr3_debug.c103 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_reg_dump() local
113 if_id, reg_addr, read_data, in ddr3_tip_reg_dump()
115 printf("0x%x ", read_data[if_id]); in ddr3_tip_reg_dump()
505 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_print_stability_log() local
539 read_data, MASK_ALL_BITS)); in ddr3_tip_print_stability_log()
544 read_data, MASK_ALL_BITS)); in ddr3_tip_print_stability_log()
549 read_data, MASK_ALL_BITS)); in ddr3_tip_print_stability_log()
582 read_data[if_id] = in ddr3_tip_print_stability_log()
583 (read_data[if_id] & in ddr3_tip_print_stability_log()
594 read_data[if_id] * 64, in ddr3_tip_print_stability_log()
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A Dddr3_training_ip_engine.c191 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_ip_training() local
446 read_data, MASK_ALL_BITS)); in ddr3_tip_ip_training()
447 reg_data = read_data[index_cnt]; in ddr3_tip_ip_training()
598 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_read_training_result() local
689 read_data, in ddr3_tip_read_training_result()
692 if ((read_data[if_id] & in ddr3_tip_read_training_result()
701 read_data in ddr3_tip_read_training_result()
707 = read_data[if_id] + in ddr3_tip_read_training_result()
768 u32 read_data[MAX_INTERFACE_NUM]; in is_odpg_access_done() local
773 ODPG_BIST_DONE, read_data, MASK_ALL_BITS)); in is_odpg_access_done()
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A Dddr3_training.c937 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_if_polling() local
958 interface_num, offset, read_data, in ddr3_tip_if_polling()
963 if (read_data[interface_num] == exp_value) in ddr3_tip_if_polling()
/drivers/ddr/marvell/a38x/
A Dmv_ddr4_training.c296 u32 read_data[MAX_INTERFACE_NUM]; in mv_ddr4_calibration_adjust() local
366 status = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x1dc8, read_data, MASK_ALL_BITS); in mv_ddr4_calibration_adjust()
370 ncal = (read_data[if_id] & (0x3f << 10)) >> 10; in mv_ddr4_calibration_adjust()
371 pcal = (read_data[if_id] & (0x3f << 4)) >> 4; in mv_ddr4_calibration_adjust()
429 status = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x14c8, read_data, MASK_ALL_BITS); in mv_ddr4_calibration_adjust()
432 ncal = (read_data[if_id] & (0x3f << 10)) >> 10; in mv_ddr4_calibration_adjust()
433 pcal = (read_data[if_id] & (0x3f << 4)) >> 4; in mv_ddr4_calibration_adjust()
445 status = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x17c8, read_data, MASK_ALL_BITS); in mv_ddr4_calibration_adjust()
448 ncal = (read_data[if_id] & (0x3f << 10)) >> 10; in mv_ddr4_calibration_adjust()
449 pcal = (read_data[if_id] & (0x3F << 4)) >> 4; in mv_ddr4_calibration_adjust()
A Dddr3_training_bist.c78 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_bist_read_result() local
87 ODPG_DATA_RX_WORD_ERR_DATA_HIGH_REG, read_data, in ddr3_tip_bist_read_result()
91 pst_bist_result->bist_fail_high = read_data[if_id]; in ddr3_tip_bist_read_result()
93 ODPG_DATA_RX_WORD_ERR_DATA_LOW_REG, read_data, in ddr3_tip_bist_read_result()
97 pst_bist_result->bist_fail_low = read_data[if_id]; in ddr3_tip_bist_read_result()
100 ODPG_DATA_RX_WORD_ERR_ADDR_REG, read_data, in ddr3_tip_bist_read_result()
104 pst_bist_result->bist_last_fail_addr = read_data[if_id]; in ddr3_tip_bist_read_result()
106 ODPG_DATA_RX_WORD_ERR_CNTR_REG, read_data, in ddr3_tip_bist_read_result()
110 pst_bist_result->bist_error_cnt = read_data[if_id]; in ddr3_tip_bist_read_result()
230 u32 subphy, read_data; in mv_ddr_tip_bist() local
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A Dddr3_debug.c137 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_reg_dump() local
148 if_id, reg_addr, read_data, in ddr3_tip_reg_dump()
150 printf("0x%x ", read_data[if_id]); in ddr3_tip_reg_dump()
593 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_print_stability_log() local
633 read_data, MASK_ALL_BITS)); in ddr3_tip_print_stability_log()
711 read_data[if_id] = in ddr3_tip_print_stability_log()
712 (read_data[if_id] & in ddr3_tip_print_stability_log()
723 read_data[if_id] * 64, in ddr3_tip_print_stability_log()
726 read_data[if_id]); in ddr3_tip_print_stability_log()
1224 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_run_leveling_sweep_test() local
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A Dmv_ddr_plat.c1575 u32 read_data[MAX_INTERFACE_NUM]; in mv_ddr4_calibration_validate() local
1631 …CHECK_STATUS(ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x1DC8, read_data, MASK_ALL_BIT… in mv_ddr4_calibration_validate()
1632 cal_n = (read_data[if_id] & ((0x3F) << 10)) >> 10; in mv_ddr4_calibration_validate()
1633 cal_p = (read_data[if_id] & ((0x3F) << 4)) >> 4; in mv_ddr4_calibration_validate()
1645 …CHECK_STATUS(ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x14C8, read_data, MASK_ALL_BIT… in mv_ddr4_calibration_validate()
1646 cal_n = (read_data[if_id] & ((0x3F) << 10)) >> 10; in mv_ddr4_calibration_validate()
1647 cal_p = (read_data[if_id] & ((0x3F) << 4)) >> 4; in mv_ddr4_calibration_validate()
1659 …CHECK_STATUS(ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 0x17C8, read_data, MASK_ALL_BIT… in mv_ddr4_calibration_validate()
1660 cal_n = (read_data[if_id] & ((0x3F) << 10)) >> 10; in mv_ddr4_calibration_validate()
1661 cal_p = (read_data[if_id] & ((0x3F) << 4)) >> 4; in mv_ddr4_calibration_validate()
A Dmv_ddr4_mpr_pda_if.c527 u32 read_data; in mv_ddr4_vref_set() local
547 ddr3_tip_if_read(dev_num, access_type, if_id, DDR4_MR6_REG, &read_data, 0xffffffff); in mv_ddr4_vref_set()
548 DEBUG_TRAINING_IP(DEBUG_LEVEL_INFO, ("mv_ddr4_vref_set: MR6 = 0x%x\n", read_data)); in mv_ddr4_vref_set()
A Dddr3_training_ip_engine.c847 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_read_training_result() local
939 read_data, in ddr3_tip_read_training_result()
942 if ((read_data[if_id] & in ddr3_tip_read_training_result()
951 read_data in ddr3_tip_read_training_result()
957 = read_data[if_id] + in ddr3_tip_read_training_result()
A Dddr3_training.c1048 u32 read_data[MAX_INTERFACE_NUM]; in ddr3_tip_if_polling() local
1069 interface_num, offset, read_data, in ddr3_tip_if_polling()
1074 if (read_data[interface_num] == exp_value) in ddr3_tip_if_polling()
/drivers/mtd/nand/raw/
A Dkmeter1_nand.c18 #define read_data() in_8(CFG_NAND_DATA_REG) macro
77 return read_data(); in kpn_nand_read_byte()
95 buf[i] = read_data(); in kpn_nand_read_buf()
/drivers/misc/
A Dnpcm_otp.c157 u8 read_data; in npcm_otp_program_bit() local
188 read_data = readl(&regs->fdata) & FDATA_MASK; in npcm_otp_program_bit()
191 if (read_data & (1 << bit_offset)) in npcm_otp_program_bit()
/drivers/net/
A Dmt7628-eth.c175 u32 phy_addr, u32 phy_register, u32 *read_data) in mii_mgr_read() argument
181 *read_data = 0xffff; in mii_mgr_read()
198 *read_data = FIELD_GET(PCR1_RD_DATA, status); in mii_mgr_read()
A Dcortina_ni.c131 struct PER_MDIO_RDDATA_t read_data; in ca_mdio_read_rgmii() local
152 ca_reg_read(&read_data, (u64)priv->per_mdio_base_addr, in ca_mdio_read_rgmii()
154 *data = read_data.mdio_rddata; in ca_mdio_read_rgmii()
/drivers/video/
A Dlogicore_dp_tx.c584 void *read_data) in aux_read() argument
593 bytes_to_read, (u8 *)read_data); in aux_read()
/drivers/video/zynqmp/
A Dzynqmp_dpsub.c708 static int aux_read(struct udevice *dev, u32 dpcd_address, u32 bytes_to_read, void *read_data) in aux_read() argument
711 bytes_to_read, (u8 *)read_data); in aux_read()

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