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Searched refs:GCC_PCIE0PHY_PHY_BCR (Results 1 – 11 of 11) sorted by relevance

/dts/upstream/include/dt-bindings/reset/
A Dqcom,gcc-ipq5018.h45 #define GCC_PCIE0PHY_PHY_BCR 36 macro
A Dqcom,gcc-ipq6018.h79 #define GCC_PCIE0PHY_PHY_BCR 70 macro
A Dqcom,ipq9574-gcc.h31 #define GCC_PCIE0PHY_PHY_BCR 22 macro
A Dqcom,ipq5424-gcc.h34 #define GCC_PCIE0PHY_PHY_BCR 25 macro
/dts/upstream/Bindings/phy/
A Dqcom,ipq8074-qmp-pcie-phy.yaml99 <&gcc GCC_PCIE0PHY_PHY_BCR>;
/dts/upstream/include/dt-bindings/clock/
A Dqcom,gcc-ipq8074.h317 #define GCC_PCIE0PHY_PHY_BCR 79 macro
/dts/upstream/src/arm64/qcom/
A Dipq5018.dtsi175 <&gcc GCC_PCIE0PHY_PHY_BCR>;
A Dipq8074.dtsi217 <&gcc GCC_PCIE0PHY_PHY_BCR>;
A Dipq5424.dtsi176 <&gcc GCC_PCIE0PHY_PHY_BCR>;
A Dipq6018.dtsi301 <&gcc GCC_PCIE0PHY_PHY_BCR>;
A Dipq9574.dtsi255 <&gcc GCC_PCIE0PHY_PHY_BCR>;

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