1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 *  armboot - Startup Code for ARM920 CPU-core
4 *
5 *  Copyright (c) 2001	Marius Gröger <mag@sysgo.de>
6 *  Copyright (c) 2002	Alex Züpke <azu@sysgo.de>
7 *  Copyright (c) 2002	Gary Jennejohn <garyj@denx.de>
8 */
9
10#include <asm-offsets.h>
11#include <config.h>
12
13/*
14 *************************************************************************
15 *
16 * Startup Code (called from the ARM reset exception vector)
17 *
18 * do important init only if we don't start from memory!
19 * relocate armboot to ram
20 * setup stack
21 * jump to second stage
22 *
23 *************************************************************************
24 */
25
26	.globl	reset
27
28reset:
29	/*
30	 * set the cpu to SVC32 mode
31	 */
32	mrs	r0, cpsr
33	bic	r0, r0, #0x1f
34	orr	r0, r0, #0xd3
35	msr	cpsr, r0
36
37	/*
38	 * we do sys-critical inits only at reboot,
39	 * not when booting from ram!
40	 */
41#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
42	bl	cpu_init_crit
43#endif
44
45	bl	_main
46
47/*------------------------------------------------------------------------------*/
48
49	.globl	c_runtime_cpu_setup
50c_runtime_cpu_setup:
51
52	mov	pc, lr
53
54/*
55 *************************************************************************
56 *
57 * CPU_init_critical registers
58 *
59 * setup important registers
60 * setup memory timing
61 *
62 *************************************************************************
63 */
64
65
66#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
67cpu_init_crit:
68	/*
69	 * flush v4 I/D caches
70	 */
71	mov	r0, #0
72	mcr	p15, 0, r0, c7, c7, 0	/* flush v3/v4 cache */
73	mcr	p15, 0, r0, c8, c7, 0	/* flush v4 TLB */
74
75	/*
76	 * disable MMU stuff and caches
77	 */
78	mrc	p15, 0, r0, c1, c0, 0
79	bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
80	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
81	orr	r0, r0, #0x00000002	@ set bit 1 (A) Align
82	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
83	mcr	p15, 0, r0, c1, c0, 0
84
85#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
86	/*
87	 * before relocating, we have to setup RAM timing
88	 * because memory timing is board-dependend, you will
89	 * find a lowlevel_init.S in your board directory.
90	 */
91	mov	ip, lr
92
93	bl	lowlevel_init
94	mov	lr, ip
95#endif
96	mov	pc, lr
97#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
98