1/* 2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 3 * 4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5 * 6 * Licensed under GPLv2 only. 7 */ 8 9#include "skeleton.dtsi" 10#include <dt-bindings/pinctrl/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/clock/at91.h> 14 15/ { 16 model = "Atmel AT91SAM9263 family SoC"; 17 compatible = "atmel,at91sam9263"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 gpio3 = &pioD; 29 gpio4 = &pioE; 30 tcb0 = &tcb0; 31 i2c0 = &i2c0; 32 ssc0 = &ssc0; 33 ssc1 = &ssc1; 34 pwm0 = &pwm0; 35 spi0 = &spi0; 36 }; 37 38 cpus { 39 cpu { 40 compatible = "arm,arm926ej-s"; 41 device_type = "cpu"; 42 }; 43 }; 44 45 memory { 46 reg = <0x20000000 0x08000000>; 47 }; 48 49 clocks { 50 main_xtal: main_xtal { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 slow_xtal: slow_xtal { 57 compatible = "fixed-clock"; 58 #clock-cells = <0>; 59 clock-frequency = <0>; 60 }; 61 }; 62 63 sram0: sram@00300000 { 64 compatible = "mmio-sram"; 65 reg = <0x00300000 0x14000>; 66 }; 67 68 sram1: sram@00500000 { 69 compatible = "mmio-sram"; 70 reg = <0x00500000 0x4000>; 71 }; 72 73 ahb { 74 compatible = "simple-bus"; 75 #address-cells = <1>; 76 #size-cells = <1>; 77 ranges; 78 bootph-all; 79 80 apb { 81 compatible = "simple-bus"; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 ranges; 85 bootph-all; 86 87 aic: interrupt-controller@fffff000 { 88 #interrupt-cells = <3>; 89 compatible = "atmel,at91rm9200-aic"; 90 interrupt-controller; 91 reg = <0xfffff000 0x200>; 92 atmel,external-irqs = <30 31>; 93 }; 94 95 pmc: pmc@fffffc00 { 96 compatible = "atmel,at91rm9200-pmc", "syscon"; 97 reg = <0xfffffc00 0x100>; 98 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 99 interrupt-controller; 100 #address-cells = <1>; 101 #size-cells = <0>; 102 #interrupt-cells = <1>; 103 bootph-all; 104 105 main_osc: main_osc { 106 compatible = "atmel,at91rm9200-clk-main-osc"; 107 #clock-cells = <0>; 108 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 109 clocks = <&main_xtal>; 110 }; 111 112 main: mainck { 113 compatible = "atmel,at91rm9200-clk-main"; 114 #clock-cells = <0>; 115 clocks = <&main_osc>; 116 }; 117 118 plla: pllack@0 { 119 compatible = "atmel,at91rm9200-clk-pll"; 120 #clock-cells = <0>; 121 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 122 clocks = <&main>; 123 reg = <0>; 124 atmel,clk-input-range = <1000000 32000000>; 125 #atmel,pll-clk-output-range-cells = <4>; 126 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 127 <190000000 240000000 2 1>; 128 }; 129 130 pllb: pllbck@1 { 131 compatible = "atmel,at91rm9200-clk-pll"; 132 #clock-cells = <0>; 133 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 134 clocks = <&main>; 135 reg = <1>; 136 atmel,clk-input-range = <1000000 32000000>; 137 #atmel,pll-clk-output-range-cells = <4>; 138 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 139 <190000000 240000000 2 1>; 140 }; 141 142 mck: masterck { 143 compatible = "atmel,at91rm9200-clk-master"; 144 #clock-cells = <0>; 145 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 146 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 147 atmel,clk-output-range = <0 120000000>; 148 atmel,clk-divisors = <1 2 4 0>; 149 bootph-all; 150 }; 151 152 usb: usbck { 153 compatible = "atmel,at91rm9200-clk-usb"; 154 #clock-cells = <0>; 155 atmel,clk-divisors = <1 2 4 0>; 156 clocks = <&pllb>; 157 }; 158 159 prog: progck { 160 compatible = "atmel,at91rm9200-clk-programmable"; 161 #address-cells = <1>; 162 #size-cells = <0>; 163 interrupt-parent = <&pmc>; 164 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 165 166 prog0: prog@0 { 167 #clock-cells = <0>; 168 reg = <0>; 169 interrupts = <AT91_PMC_PCKRDY(0)>; 170 }; 171 172 prog1: prog@1 { 173 #clock-cells = <0>; 174 reg = <1>; 175 interrupts = <AT91_PMC_PCKRDY(1)>; 176 }; 177 178 prog2: prog@2 { 179 #clock-cells = <0>; 180 reg = <2>; 181 interrupts = <AT91_PMC_PCKRDY(2)>; 182 }; 183 184 prog3: prog@3 { 185 #clock-cells = <0>; 186 reg = <3>; 187 interrupts = <AT91_PMC_PCKRDY(3)>; 188 }; 189 }; 190 191 systemck { 192 compatible = "atmel,at91rm9200-clk-system"; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 196 uhpck: uhpck@6 { 197 #clock-cells = <0>; 198 reg = <6>; 199 clocks = <&usb>; 200 }; 201 202 udpck: udpck@7 { 203 #clock-cells = <0>; 204 reg = <7>; 205 clocks = <&usb>; 206 }; 207 208 pck0: pck0@8 { 209 #clock-cells = <0>; 210 reg = <8>; 211 clocks = <&prog0>; 212 }; 213 214 pck1: pck1@9 { 215 #clock-cells = <0>; 216 reg = <9>; 217 clocks = <&prog1>; 218 }; 219 220 pck2: pck2@10 { 221 #clock-cells = <0>; 222 reg = <10>; 223 clocks = <&prog2>; 224 }; 225 226 pck3: pck3@11 { 227 #clock-cells = <0>; 228 reg = <11>; 229 clocks = <&prog3>; 230 }; 231 }; 232 233 periphck { 234 compatible = "atmel,at91rm9200-clk-peripheral"; 235 #address-cells = <1>; 236 #size-cells = <0>; 237 clocks = <&mck>; 238 bootph-all; 239 240 pioA_clk: pioA_clk@2 { 241 #clock-cells = <0>; 242 reg = <2>; 243 bootph-all; 244 }; 245 246 pioB_clk: pioB_clk@3 { 247 #clock-cells = <0>; 248 reg = <3>; 249 bootph-all; 250 }; 251 252 pioCDE_clk: pioCDE_clk@4 { 253 #clock-cells = <0>; 254 reg = <4>; 255 bootph-all; 256 }; 257 258 usart0_clk: usart0_clk@7 { 259 #clock-cells = <0>; 260 reg = <7>; 261 }; 262 263 usart1_clk: usart1_clk@8 { 264 #clock-cells = <0>; 265 reg = <8>; 266 }; 267 268 usart2_clk: usart2_clk@9 { 269 #clock-cells = <0>; 270 reg = <9>; 271 }; 272 273 mci0_clk: mci0_clk@10 { 274 #clock-cells = <0>; 275 reg = <10>; 276 }; 277 278 mci1_clk: mci1_clk@11 { 279 #clock-cells = <0>; 280 reg = <11>; 281 }; 282 283 can_clk: can_clk@12 { 284 #clock-cells = <0>; 285 reg = <12>; 286 }; 287 288 twi0_clk: twi0_clk@13 { 289 #clock-cells = <0>; 290 reg = <13>; 291 }; 292 293 spi0_clk: spi0_clk@14 { 294 #clock-cells = <0>; 295 reg = <14>; 296 }; 297 298 spi1_clk: spi1_clk@15 { 299 #clock-cells = <0>; 300 reg = <15>; 301 }; 302 303 ssc0_clk: ssc0_clk@16 { 304 #clock-cells = <0>; 305 reg = <16>; 306 }; 307 308 ssc1_clk: ssc1_clk@17 { 309 #clock-cells = <0>; 310 reg = <17>; 311 }; 312 313 ac97_clk: ac97_clk@18 { 314 #clock-cells = <0>; 315 reg = <18>; 316 }; 317 318 tcb_clk: tcb_clk@19 { 319 #clock-cells = <0>; 320 reg = <19>; 321 }; 322 323 pwm_clk: pwm_clk@20 { 324 #clock-cells = <0>; 325 reg = <20>; 326 }; 327 328 macb0_clk: macb0_clk@21 { 329 #clock-cells = <0>; 330 reg = <21>; 331 }; 332 333 g2de_clk: g2de_clk@23 { 334 #clock-cells = <0>; 335 reg = <23>; 336 }; 337 338 udc_clk: udc_clk@24 { 339 #clock-cells = <0>; 340 reg = <24>; 341 }; 342 343 isi_clk: isi_clk@25 { 344 #clock-cells = <0>; 345 reg = <25>; 346 }; 347 348 lcd_clk: lcd_clk@26 { 349 #clock-cells = <0>; 350 reg = <26>; 351 }; 352 353 dma_clk: dma_clk@27 { 354 #clock-cells = <0>; 355 reg = <27>; 356 }; 357 358 ohci_clk: ohci_clk@29 { 359 #clock-cells = <0>; 360 reg = <29>; 361 }; 362 }; 363 }; 364 365 ramc0: ramc@ffffe200 { 366 compatible = "atmel,at91sam9260-sdramc"; 367 reg = <0xffffe200 0x200>; 368 }; 369 370 ramc1: ramc@ffffe800 { 371 compatible = "atmel,at91sam9260-sdramc"; 372 reg = <0xffffe800 0x200>; 373 }; 374 375 pit: timer@fffffd30 { 376 compatible = "atmel,at91sam9260-pit"; 377 reg = <0xfffffd30 0xf>; 378 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 379 clocks = <&mck>; 380 }; 381 382 tcb0: timer@fff7c000 { 383 compatible = "atmel,at91rm9200-tcb"; 384 reg = <0xfff7c000 0x100>; 385 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 386 clocks = <&tcb_clk>, <&slow_xtal>; 387 clock-names = "t0_clk", "slow_clk"; 388 }; 389 390 rstc@fffffd00 { 391 compatible = "atmel,at91sam9260-rstc"; 392 reg = <0xfffffd00 0x10>; 393 clocks = <&slow_xtal>; 394 }; 395 396 shdwc@fffffd10 { 397 compatible = "atmel,at91sam9260-shdwc"; 398 reg = <0xfffffd10 0x10>; 399 clocks = <&slow_xtal>; 400 }; 401 402 pinctrl@fffff200 { 403 #address-cells = <1>; 404 #size-cells = <1>; 405 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 406 ranges = <0xfffff200 0xfffff200 0xa00>; 407 408 atmel,mux-mask = < 409 /* A B */ 410 0xfffffffb 0xffffe07f /* pioA */ 411 0x0007ffff 0x39072fff /* pioB */ 412 0xffffffff 0x3ffffff8 /* pioC */ 413 0xfffffbff 0xffffffff /* pioD */ 414 0xffe00fff 0xfbfcff00 /* pioE */ 415 >; 416 417 /* shared pinctrl settings */ 418 dbgu { 419 pinctrl_dbgu: dbgu-0 { 420 atmel,pins = 421 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 422 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 423 }; 424 }; 425 426 usart0 { 427 pinctrl_usart0: usart0-0 { 428 atmel,pins = 429 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ 430 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ 431 }; 432 433 pinctrl_usart0_rts: usart0_rts-0 { 434 atmel,pins = 435 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ 436 }; 437 438 pinctrl_usart0_cts: usart0_cts-0 { 439 atmel,pins = 440 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ 441 }; 442 }; 443 444 usart1 { 445 pinctrl_usart1: usart1-0 { 446 atmel,pins = 447 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ 448 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ 449 }; 450 451 pinctrl_usart1_rts: usart1_rts-0 { 452 atmel,pins = 453 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ 454 }; 455 456 pinctrl_usart1_cts: usart1_cts-0 { 457 atmel,pins = 458 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ 459 }; 460 }; 461 462 usart2 { 463 pinctrl_usart2: usart2-0 { 464 atmel,pins = 465 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ 466 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ 467 }; 468 469 pinctrl_usart2_rts: usart2_rts-0 { 470 atmel,pins = 471 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ 472 }; 473 474 pinctrl_usart2_cts: usart2_cts-0 { 475 atmel,pins = 476 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ 477 }; 478 }; 479 480 nand { 481 pinctrl_nand: nand-0 { 482 atmel,pins = 483 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ 484 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ 485 }; 486 }; 487 488 macb { 489 pinctrl_macb_rmii: macb_rmii-0 { 490 atmel,pins = 491 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 492 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 493 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 494 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 495 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 496 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 497 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 498 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 499 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 500 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 501 }; 502 503 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 504 atmel,pins = 505 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ 506 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ 507 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ 508 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ 509 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ 510 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 511 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ 512 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ 513 }; 514 }; 515 516 mmc0 { 517 pinctrl_mmc0_clk: mmc0_clk-0 { 518 atmel,pins = 519 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ 520 }; 521 522 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 523 atmel,pins = 524 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 525 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 526 }; 527 528 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 529 atmel,pins = 530 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 531 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 532 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 533 }; 534 535 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 536 atmel,pins = 537 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 538 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ 539 }; 540 541 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 542 atmel,pins = 543 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 544 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 545 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 546 }; 547 }; 548 549 mmc1 { 550 pinctrl_mmc1_clk: mmc1_clk-0 { 551 atmel,pins = 552 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ 553 }; 554 555 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 556 atmel,pins = 557 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 558 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ 559 }; 560 561 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 562 atmel,pins = 563 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 564 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 565 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 566 }; 567 568 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 569 atmel,pins = 570 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ 571 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ 572 }; 573 574 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 575 atmel,pins = 576 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ 577 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 578 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ 579 }; 580 }; 581 582 ssc0 { 583 pinctrl_ssc0_tx: ssc0_tx-0 { 584 atmel,pins = 585 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ 586 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ 587 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ 588 }; 589 590 pinctrl_ssc0_rx: ssc0_rx-0 { 591 atmel,pins = 592 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ 593 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ 594 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ 595 }; 596 }; 597 598 ssc1 { 599 pinctrl_ssc1_tx: ssc1_tx-0 { 600 atmel,pins = 601 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 602 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 603 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 604 }; 605 606 pinctrl_ssc1_rx: ssc1_rx-0 { 607 atmel,pins = 608 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 609 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 610 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 611 }; 612 }; 613 614 spi0 { 615 pinctrl_spi0: spi0-0 { 616 atmel,pins = 617 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ 618 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ 619 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ 620 }; 621 }; 622 623 spi1 { 624 pinctrl_spi1: spi1-0 { 625 atmel,pins = 626 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ 627 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ 628 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ 629 }; 630 }; 631 632 tcb0 { 633 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 634 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 635 }; 636 637 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 638 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 639 }; 640 641 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 642 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 643 }; 644 645 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 646 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 647 }; 648 649 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 650 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 651 }; 652 653 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 654 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 655 }; 656 657 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 658 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 659 }; 660 661 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 662 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 663 }; 664 665 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 666 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 667 }; 668 }; 669 670 fb { 671 pinctrl_fb: fb-0 { 672 atmel,pins = 673 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ 674 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ 675 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ 676 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ 677 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ 678 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ 679 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ 680 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ 681 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ 682 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ 683 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ 684 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ 685 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ 686 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ 687 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ 688 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ 689 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ 690 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ 691 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ 692 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ 693 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ 694 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ 695 }; 696 }; 697 698 can { 699 pinctrl_can_rx_tx: can_rx_tx { 700 atmel,pins = 701 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ 702 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ 703 }; 704 }; 705 706 ac97 { 707 pinctrl_ac97: ac97-0 { 708 atmel,pins = 709 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ 710 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ 711 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ 712 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ 713 }; 714 }; 715 716 pioA: gpio@fffff200 { 717 compatible = "atmel,at91rm9200-gpio"; 718 reg = <0xfffff200 0x200>; 719 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 720 #gpio-cells = <2>; 721 gpio-controller; 722 interrupt-controller; 723 #interrupt-cells = <2>; 724 clocks = <&pioA_clk>; 725 bootph-all; 726 }; 727 728 pioB: gpio@fffff400 { 729 compatible = "atmel,at91rm9200-gpio"; 730 reg = <0xfffff400 0x200>; 731 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 732 #gpio-cells = <2>; 733 gpio-controller; 734 interrupt-controller; 735 #interrupt-cells = <2>; 736 clocks = <&pioB_clk>; 737 bootph-all; 738 }; 739 740 pioC: gpio@fffff600 { 741 compatible = "atmel,at91rm9200-gpio"; 742 reg = <0xfffff600 0x200>; 743 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 744 #gpio-cells = <2>; 745 gpio-controller; 746 interrupt-controller; 747 #interrupt-cells = <2>; 748 clocks = <&pioCDE_clk>; 749 bootph-all; 750 }; 751 752 pioD: gpio@fffff800 { 753 compatible = "atmel,at91rm9200-gpio"; 754 reg = <0xfffff800 0x200>; 755 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 756 #gpio-cells = <2>; 757 gpio-controller; 758 interrupt-controller; 759 #interrupt-cells = <2>; 760 clocks = <&pioCDE_clk>; 761 bootph-all; 762 }; 763 764 pioE: gpio@fffffa00 { 765 compatible = "atmel,at91rm9200-gpio"; 766 reg = <0xfffffa00 0x200>; 767 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 768 #gpio-cells = <2>; 769 gpio-controller; 770 interrupt-controller; 771 #interrupt-cells = <2>; 772 clocks = <&pioCDE_clk>; 773 bootph-all; 774 }; 775 }; 776 777 dbgu: serial@ffffee00 { 778 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 779 reg = <0xffffee00 0x200>; 780 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 781 pinctrl-names = "default"; 782 pinctrl-0 = <&pinctrl_dbgu>; 783 clocks = <&mck>; 784 clock-names = "usart"; 785 status = "disabled"; 786 }; 787 788 usart0: serial@fff8c000 { 789 compatible = "atmel,at91sam9260-usart"; 790 reg = <0xfff8c000 0x200>; 791 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 792 atmel,use-dma-rx; 793 atmel,use-dma-tx; 794 pinctrl-names = "default"; 795 pinctrl-0 = <&pinctrl_usart0>; 796 clocks = <&usart0_clk>; 797 clock-names = "usart"; 798 status = "disabled"; 799 }; 800 801 usart1: serial@fff90000 { 802 compatible = "atmel,at91sam9260-usart"; 803 reg = <0xfff90000 0x200>; 804 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 805 atmel,use-dma-rx; 806 atmel,use-dma-tx; 807 pinctrl-names = "default"; 808 pinctrl-0 = <&pinctrl_usart1>; 809 clocks = <&usart1_clk>; 810 clock-names = "usart"; 811 status = "disabled"; 812 }; 813 814 usart2: serial@fff94000 { 815 compatible = "atmel,at91sam9260-usart"; 816 reg = <0xfff94000 0x200>; 817 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 818 atmel,use-dma-rx; 819 atmel,use-dma-tx; 820 pinctrl-names = "default"; 821 pinctrl-0 = <&pinctrl_usart2>; 822 clocks = <&usart2_clk>; 823 clock-names = "usart"; 824 status = "disabled"; 825 }; 826 827 ssc0: ssc@fff98000 { 828 compatible = "atmel,at91rm9200-ssc"; 829 reg = <0xfff98000 0x4000>; 830 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 831 pinctrl-names = "default"; 832 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 833 clocks = <&ssc0_clk>; 834 clock-names = "pclk"; 835 status = "disabled"; 836 }; 837 838 ssc1: ssc@fff9c000 { 839 compatible = "atmel,at91rm9200-ssc"; 840 reg = <0xfff9c000 0x4000>; 841 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 842 pinctrl-names = "default"; 843 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 844 clocks = <&ssc1_clk>; 845 clock-names = "pclk"; 846 status = "disabled"; 847 }; 848 849 ac97: sound@fffa0000 { 850 compatible = "atmel,at91sam9263-ac97c"; 851 reg = <0xfffa0000 0x4000>; 852 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; 853 pinctrl-names = "default"; 854 pinctrl-0 = <&pinctrl_ac97>; 855 clocks = <&ac97_clk>; 856 clock-names = "ac97_clk"; 857 status = "disabled"; 858 }; 859 860 macb0: ethernet@fffbc000 { 861 compatible = "cdns,at91sam9260-macb", "cdns,macb"; 862 reg = <0xfffbc000 0x100>; 863 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 864 pinctrl-names = "default"; 865 pinctrl-0 = <&pinctrl_macb_rmii>; 866 clocks = <&macb0_clk>, <&macb0_clk>; 867 clock-names = "hclk", "pclk"; 868 status = "disabled"; 869 }; 870 871 usb1: gadget@fff78000 { 872 compatible = "atmel,at91sam9263-udc"; 873 reg = <0xfff78000 0x4000>; 874 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 875 clocks = <&udc_clk>, <&udpck>; 876 clock-names = "pclk", "hclk"; 877 status = "disabled"; 878 }; 879 880 i2c0: i2c@fff88000 { 881 compatible = "atmel,at91sam9260-i2c"; 882 reg = <0xfff88000 0x100>; 883 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 884 #address-cells = <1>; 885 #size-cells = <0>; 886 clocks = <&twi0_clk>; 887 status = "disabled"; 888 }; 889 890 mmc0: mmc@fff80000 { 891 compatible = "atmel,hsmci"; 892 reg = <0xfff80000 0x600>; 893 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 894 pinctrl-names = "default"; 895 #address-cells = <1>; 896 #size-cells = <0>; 897 clocks = <&mci0_clk>; 898 clock-names = "mci_clk"; 899 status = "disabled"; 900 }; 901 902 mmc1: mmc@fff84000 { 903 compatible = "atmel,hsmci"; 904 reg = <0xfff84000 0x600>; 905 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 906 pinctrl-names = "default"; 907 #address-cells = <1>; 908 #size-cells = <0>; 909 clocks = <&mci1_clk>; 910 clock-names = "mci_clk"; 911 status = "disabled"; 912 }; 913 914 watchdog@fffffd40 { 915 compatible = "atmel,at91sam9260-wdt"; 916 reg = <0xfffffd40 0x10>; 917 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 918 clocks = <&slow_xtal>; 919 atmel,watchdog-type = "hardware"; 920 atmel,reset-type = "all"; 921 atmel,dbg-halt; 922 status = "disabled"; 923 }; 924 925 spi0: spi@fffa4000 { 926 #address-cells = <1>; 927 #size-cells = <0>; 928 compatible = "atmel,at91rm9200-spi"; 929 reg = <0xfffa4000 0x200>; 930 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 931 pinctrl-names = "default"; 932 pinctrl-0 = <&pinctrl_spi0>; 933 clocks = <&spi0_clk>; 934 clock-names = "spi_clk"; 935 status = "disabled"; 936 }; 937 938 spi1: spi@fffa8000 { 939 #address-cells = <1>; 940 #size-cells = <0>; 941 compatible = "atmel,at91rm9200-spi"; 942 reg = <0xfffa8000 0x200>; 943 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; 944 pinctrl-names = "default"; 945 pinctrl-0 = <&pinctrl_spi1>; 946 clocks = <&spi1_clk>; 947 clock-names = "spi_clk"; 948 status = "disabled"; 949 }; 950 951 pwm0: pwm@fffb8000 { 952 compatible = "atmel,at91sam9rl-pwm"; 953 reg = <0xfffb8000 0x300>; 954 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; 955 #pwm-cells = <3>; 956 clocks = <&pwm_clk>; 957 clock-names = "pwm_clk"; 958 status = "disabled"; 959 }; 960 961 can: can@fffac000 { 962 compatible = "atmel,at91sam9263-can"; 963 reg = <0xfffac000 0x300>; 964 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 965 pinctrl-names = "default"; 966 pinctrl-0 = <&pinctrl_can_rx_tx>; 967 clocks = <&can_clk>; 968 clock-names = "can_clk"; 969 }; 970 971 rtc@fffffd20 { 972 compatible = "atmel,at91sam9260-rtt"; 973 reg = <0xfffffd20 0x10>; 974 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 975 clocks = <&slow_xtal>; 976 status = "disabled"; 977 }; 978 979 rtc@fffffd50 { 980 compatible = "atmel,at91sam9260-rtt"; 981 reg = <0xfffffd50 0x10>; 982 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 983 clocks = <&slow_xtal>; 984 status = "disabled"; 985 }; 986 987 gpbr: syscon@fffffd60 { 988 compatible = "atmel,at91sam9260-gpbr", "syscon"; 989 reg = <0xfffffd60 0x50>; 990 status = "disabled"; 991 }; 992 }; 993 994 fb0: fb@0x00700000 { 995 compatible = "atmel,at91sam9263-lcdc"; 996 reg = <0x00700000 0x1000>; 997 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 998 pinctrl-names = "default"; 999 pinctrl-0 = <&pinctrl_fb>; 1000 clocks = <&lcd_clk>, <&lcd_clk>; 1001 clock-names = "lcdc_clk", "hclk"; 1002 status = "disabled"; 1003 }; 1004 1005 nand0: nand@40000000 { 1006 compatible = "atmel,at91rm9200-nand"; 1007 #address-cells = <1>; 1008 #size-cells = <1>; 1009 reg = <0x40000000 0x10000000 1010 0xffffe000 0x200 1011 >; 1012 atmel,nand-addr-offset = <21>; 1013 atmel,nand-cmd-offset = <22>; 1014 pinctrl-names = "default"; 1015 pinctrl-0 = <&pinctrl_nand>; 1016 gpios = <&pioA 22 GPIO_ACTIVE_HIGH 1017 &pioD 15 GPIO_ACTIVE_HIGH 1018 0 1019 >; 1020 status = "disabled"; 1021 }; 1022 1023 usb0: ohci@00a00000 { 1024 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1025 reg = <0x00a00000 0x100000>; 1026 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; 1027 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; 1028 clock-names = "ohci_clk", "hclk", "uhpck"; 1029 status = "disabled"; 1030 }; 1031 }; 1032 1033 i2c-gpio-0 { 1034 compatible = "i2c-gpio"; 1035 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ 1036 &pioB 5 GPIO_ACTIVE_HIGH /* scl */ 1037 >; 1038 i2c-gpio,sda-open-drain; 1039 i2c-gpio,scl-open-drain; 1040 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 1041 #address-cells = <1>; 1042 #size-cells = <0>; 1043 status = "disabled"; 1044 }; 1045}; 1046