1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/clk/ti-dra7-atl.h> 8#include <dt-bindings/input/input.h> 9 10/ { 11 chosen { 12 stdout-path = &uart1; 13 }; 14 15 extcon_usb1: extcon_usb1 { 16 compatible = "linux,extcon-usb-gpio"; 17 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 18 }; 19 20 sound0: sound0 { 21 compatible = "simple-audio-card"; 22 simple-audio-card,name = "DRA7xx-EVM"; 23 simple-audio-card,widgets = 24 "Headphone", "Headphone Jack", 25 "Line", "Line Out", 26 "Microphone", "Mic Jack", 27 "Line", "Line In"; 28 simple-audio-card,routing = 29 "Headphone Jack", "HPLOUT", 30 "Headphone Jack", "HPROUT", 31 "Line Out", "LLOUT", 32 "Line Out", "RLOUT", 33 "MIC3L", "Mic Jack", 34 "MIC3R", "Mic Jack", 35 "Mic Jack", "Mic Bias", 36 "LINE1L", "Line In", 37 "LINE1R", "Line In"; 38 simple-audio-card,format = "dsp_b"; 39 simple-audio-card,bitclock-master = <&sound0_master>; 40 simple-audio-card,frame-master = <&sound0_master>; 41 simple-audio-card,bitclock-inversion; 42 43 sound0_master: simple-audio-card,cpu { 44 sound-dai = <&mcasp3>; 45 system-clock-frequency = <5644800>; 46 }; 47 48 simple-audio-card,codec { 49 sound-dai = <&tlv320aic3106>; 50 clocks = <&atl_clkin2_ck>; 51 }; 52 }; 53 54 leds { 55 compatible = "gpio-leds"; 56 led0 { 57 label = "dra7:usr1"; 58 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>; 59 default-state = "off"; 60 }; 61 62 led1 { 63 label = "dra7:usr2"; 64 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>; 65 default-state = "off"; 66 }; 67 68 led2 { 69 label = "dra7:usr3"; 70 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>; 71 default-state = "off"; 72 }; 73 74 led3 { 75 label = "dra7:usr4"; 76 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>; 77 default-state = "off"; 78 }; 79 }; 80 81 gpio_keys { 82 compatible = "gpio-keys"; 83 #address-cells = <1>; 84 #size-cells = <0>; 85 autorepeat; 86 87 USER1 { 88 label = "btnUser1"; 89 linux,code = <BTN_0>; 90 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>; 91 }; 92 93 USER2 { 94 label = "btnUser2"; 95 linux,code = <BTN_1>; 96 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>; 97 }; 98 }; 99}; 100 101&i2c3 { 102 status = "okay"; 103 clock-frequency = <400000>; 104}; 105 106&mcspi1 { 107 status = "okay"; 108}; 109 110&mcspi2 { 111 status = "okay"; 112}; 113 114&uart1 { 115 status = "okay"; 116 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 117 <&dra7_pmx_core 0x3e0>; 118}; 119 120&uart2 { 121 status = "okay"; 122}; 123 124&uart3 { 125 status = "okay"; 126}; 127 128&qspi { 129 status = "okay"; 130 131 spi-max-frequency = <76800000>; 132 flash@0 { 133 compatible = "s25fl256s1"; 134 spi-max-frequency = <76800000>; 135 reg = <0>; 136 spi-tx-bus-width = <1>; 137 spi-rx-bus-width = <4>; 138 #address-cells = <1>; 139 #size-cells = <1>; 140 141 /* MTD partition table. 142 * The ROM checks the first four physical blocks 143 * for a valid file to boot and the flash here is 144 * 64KiB block size. 145 */ 146 partition@0 { 147 label = "QSPI.SPL"; 148 reg = <0x00000000 0x00010000>; 149 }; 150 partition@1 { 151 label = "QSPI.SPL.backup1"; 152 reg = <0x00010000 0x00010000>; 153 }; 154 partition@2 { 155 label = "QSPI.SPL.backup2"; 156 reg = <0x00020000 0x00010000>; 157 }; 158 partition@3 { 159 label = "QSPI.SPL.backup3"; 160 reg = <0x00030000 0x00010000>; 161 }; 162 partition@4 { 163 label = "QSPI.u-boot"; 164 reg = <0x00040000 0x00100000>; 165 }; 166 partition@5 { 167 label = "QSPI.u-boot-spl-os"; 168 reg = <0x00140000 0x00080000>; 169 }; 170 partition@6 { 171 label = "QSPI.u-boot-env"; 172 reg = <0x001c0000 0x00010000>; 173 }; 174 partition@7 { 175 label = "QSPI.u-boot-env.backup1"; 176 reg = <0x001d0000 0x0010000>; 177 }; 178 partition@8 { 179 label = "QSPI.kernel"; 180 reg = <0x001e0000 0x0800000>; 181 }; 182 partition@9 { 183 label = "QSPI.file-system"; 184 reg = <0x009e0000 0x01620000>; 185 }; 186 }; 187}; 188 189&omap_dwc3_1 { 190 extcon = <&extcon_usb1>; 191}; 192 193&usb1 { 194 dr_mode = "otg"; 195 extcon = <&extcon_usb1>; 196}; 197 198&usb2 { 199 dr_mode = "host"; 200}; 201 202&atl { 203 assigned-clocks = <&abe_dpll_sys_clk_mux>, 204 <&atl_gfclk_mux>, 205 <&dpll_abe_ck>, 206 <&dpll_abe_m2x2_ck>, 207 <&atl_clkin2_ck>; 208 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; 209 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>; 210 211 status = "okay"; 212 213 atl2 { 214 bws = <DRA7_ATL_WS_MCASP2_FSX>; 215 aws = <DRA7_ATL_WS_MCASP3_FSX>; 216 }; 217}; 218 219&mcasp3 { 220 #sound-dai-cells = <0>; 221 222 assigned-clocks = <&mcasp3_ahclkx_mux>; 223 assigned-clock-parents = <&atl_clkin2_ck>; 224 225 status = "okay"; 226 227 op-mode = <0>; /* MCASP_IIS_MODE */ 228 tdm-slots = <2>; 229 /* 4 serializer */ 230 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 231 1 2 0 0 232 >; 233 tx-num-evt = <32>; 234 rx-num-evt = <32>; 235}; 236 237&mailbox5 { 238 status = "okay"; 239 mbox_ipu1_ipc3x: mbox-ipu1-ipc3x { 240 status = "okay"; 241 }; 242 mbox_dsp1_ipc3x: mbox-dsp1-ipc3x { 243 status = "okay"; 244 }; 245}; 246 247&mailbox6 { 248 status = "okay"; 249 mbox_ipu2_ipc3x: mbox-ipu2-ipc3x { 250 status = "okay"; 251 }; 252 mbox_dsp2_ipc3x: mbox-dsp2-ipc3x { 253 status = "okay"; 254 }; 255}; 256