1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6#include "dra72-evm-common.dtsi"
7#include "dra72x-mmc-iodelay.dtsi"
8#include <dt-bindings/net/ti-dp83867.h>
9
10/ {
11	compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
12	model = "TI DRA718 EVM";
13
14	memory {
15		device_type = "memory";
16		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
17	};
18
19	vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
20		compatible = "regulator-gpio";
21
22		regulator-name = "vddshv8";
23		regulator-min-microvolt = <1800000>;
24		regulator-max-microvolt = <3300000>;
25		regulator-boot-on;
26		vin-supply = <&evm_5v0>;
27
28		gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
29		states = <1800000 0x0
30			  3300000 0x1>;
31	};
32
33	evm_1v8_sw: fixedregulator-evm_1v8 {
34		compatible = "regulator-fixed";
35		regulator-name = "evm_1v8";
36		regulator-min-microvolt = <1800000>;
37		regulator-max-microvolt = <1800000>;
38		vin-supply = <&lp8732_buck0_reg>;
39		regulator-always-on;
40		regulator-boot-on;
41	};
42
43	poweroff: gpio-poweroff {
44		compatible = "gpio-poweroff";
45		gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
46		input;
47	};
48};
49
50&i2c1 {
51	status = "okay";
52	clock-frequency = <400000>;
53
54	lp8733: lp8733@60 {
55		compatible = "ti,lp8733";
56		reg = <0x60>;
57
58		buck0-in-supply =<&vsys_3v3>;
59		buck1-in-supply =<&vsys_3v3>;
60		ldo0-in-supply =<&evm_5v0>;
61		ldo1-in-supply =<&evm_5v0>;
62
63		lp8733_regulators: regulators {
64			lp8733_buck0_reg: buck0 {
65				/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
66				regulator-name = "lp8733-buck0";
67				regulator-min-microvolt = <850000>;
68				regulator-max-microvolt = <1250000>;
69				regulator-always-on;
70				regulator-boot-on;
71			};
72
73			lp8733_buck1_reg: buck1 {
74				/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
75				regulator-name = "lp8733-buck1";
76				regulator-min-microvolt = <850000>;
77				regulator-max-microvolt = <1250000>;
78				regulator-boot-on;
79				regulator-always-on;
80			};
81
82			lp8733_ldo0_reg: ldo0 {
83				/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
84				regulator-name = "lp8733-ldo0";
85				regulator-min-microvolt = <3300000>;
86				regulator-max-microvolt = <3300000>;
87			};
88
89			lp8733_ldo1_reg: ldo1 {
90				/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
91				regulator-name = "lp8733-ldo1";
92				regulator-min-microvolt = <3300000>;
93				regulator-max-microvolt = <3300000>;
94				regulator-always-on;
95				regulator-boot-on;
96			};
97		};
98	};
99
100	lp8732: lp8732@61 {
101		compatible = "ti,lp8732";
102		reg = <0x61>;
103
104		buck0-in-supply =<&vsys_3v3>;
105		buck1-in-supply =<&vsys_3v3>;
106		ldo0-in-supply =<&vsys_3v3>;
107		ldo1-in-supply =<&vsys_3v3>;
108
109		lp8732_regulators: regulators {
110			lp8732_buck0_reg: buck0 {
111				/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
112				regulator-name = "lp8732-buck0";
113				regulator-min-microvolt = <1800000>;
114				regulator-max-microvolt = <1800000>;
115				regulator-always-on;
116				regulator-boot-on;
117			};
118
119			lp8732_buck1_reg: buck1 {
120				/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
121				regulator-name = "lp8732-buck1";
122				regulator-min-microvolt = <1350000>;
123				regulator-max-microvolt = <1350000>;
124				regulator-boot-on;
125				regulator-always-on;
126			};
127
128			lp8732_ldo0_reg: ldo0 {
129				/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
130				regulator-name = "lp8732-ldo0";
131				regulator-min-microvolt = <1800000>;
132				regulator-max-microvolt = <1800000>;
133				regulator-boot-on;
134				regulator-always-on;
135			};
136
137			lp8732_ldo1_reg: ldo1 {
138				/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
139				regulator-name = "lp8732-ldo1";
140				regulator-min-microvolt = <1800000>;
141				regulator-max-microvolt = <1800000>;
142				regulator-always-on;
143				regulator-boot-on;
144			};
145		};
146	};
147};
148
149&pcf_lcd {
150	interrupt-parent = <&gpio7>;
151	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
152};
153
154&pcf_gpio_21 {
155	interrupt-parent = <&gpio7>;
156	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
157};
158
159&pcf_hdmi {
160	hdmi-i2c-disable-hog {
161		/*
162		 * PM_OEn to High: Disable routing I2C3 to PM_I2C
163		 * With this PM_SEL(p3) should not matter
164		 */
165		gpio-hog;
166		gpios = <0 GPIO_ACTIVE_LOW>;
167		output-high;
168		line-name = "pm_oe_n";
169	};
170};
171
172&mmc1 {
173	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
174	pinctrl-0 = <&mmc1_pins_default>;
175	pinctrl-1 = <&mmc1_pins_hs>;
176	pinctrl-2 = <&mmc1_pins_sdr12>;
177	pinctrl-3 = <&mmc1_pins_sdr25>;
178	pinctrl-4 = <&mmc1_pins_sdr50>;
179	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
180	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
181	vqmmc-supply = <&vpo_sd_1v8_3v3>;
182};
183
184&mmc2 {
185	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
186	pinctrl-0 = <&mmc2_pins_default>;
187	pinctrl-1 = <&mmc2_pins_hs>;
188	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
189	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
190	vmmc-supply = <&evm_1v8_sw>;
191};
192
193&mac {
194	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
195		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */
196		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */
197	dual_emac;
198};
199
200&cpsw_emac0 {
201	phy-handle = <&dp83867_0>;
202	phy-mode = "rgmii-id";
203	dual_emac_res_vlan = <1>;
204};
205
206&cpsw_emac1 {
207	phy-handle = <&dp83867_1>;
208	phy-mode = "rgmii-id";
209	dual_emac_res_vlan = <2>;
210};
211
212&davinci_mdio {
213	dp83867_0: ethernet-phy@2 {
214		reg = <2>;
215		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
216		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
217		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
218		ti,min-output-impedance;
219		ti,dp83867-rxctrl-strap-quirk;
220	};
221
222	dp83867_1: ethernet-phy@3 {
223		reg = <3>;
224		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
225		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
226		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
227		ti,min-output-impedance;
228		ti,dp83867-rxctrl-strap-quirk;
229	};
230};
231
232/* No Sata on this device */
233&sata_phy {
234	status = "disabled";
235};
236
237&sata {
238	status = "disabled";
239};
240
241/* No RTC on this device */
242&rtc {
243	status = "disabled";
244};
245
246&usb2_phy1 {
247	phy-supply = <&lp8733_ldo1_reg>;
248};
249
250&usb2_phy2 {
251	phy-supply = <&lp8733_ldo1_reg>;
252};
253
254&dss {
255	/* Supplied by VDA_1V8_PLL */
256	vdda_video-supply = <&lp8732_ldo0_reg>;
257};
258
259&hdmi {
260	/* Supplied by VDA_1V8_PHY */
261	vdda_video-supply = <&lp8732_ldo1_reg>;
262};
263