1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Xilinx Versal Mini eMMC1 Configuration
4 *
5 * (C) Copyright 2018-2019, Xilinx, Inc.
6 *
7 * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>
8 * Michal Simek <michal.simek@amd.com>
9 */
10
11/dts-v1/;
12
13/ {
14	compatible = "xlnx,versal";
15	#address-cells = <2>;
16	#size-cells = <2>;
17	model = "Xilinx Versal MINI eMMC1";
18
19	clk200: clk200 {
20		compatible = "fixed-clock";
21		#clock-cells = <0x0>;
22		clock-frequency = <200000000>;
23	};
24
25	dcc: dcc {
26		compatible = "arm,dcc";
27		status = "okay";
28		bootph-all;
29	};
30
31	sdhci1: sdhci@f1050000 {
32		compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
33		status = "okay";
34		non-removable;
35		disable-wp;
36		no-sd;
37		no-sdio;
38		cap-mmc-hw-reset;
39		bus-width = <8>;
40		reg = <0x0 0xf1050000 0x0 0x10000>;
41		clock-names = "clk_xin", "clk_ahb";
42		clocks = <&clk200 &clk200>;
43		no-1-8-v;
44		xlnx,mio-bank = <0>;
45	};
46
47	aliases {
48		serial0 = &dcc;
49		mmc0 = &sdhci1;
50	};
51
52	chosen {
53		stdout-path = "serial0:115200";
54	};
55
56	memory@0 {
57		device_type = "memory";
58		reg = <0x0 0x0 0x0 0x20000000>;
59	};
60};
61