1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2010
4 * Texas Instruments, <www.ti.com>
5 * Aneesh V <aneesh@ti.com>
6 */
7 #include <linux/types.h>
8 #include <asm/io.h>
9 #include <asm/armv7.h>
10 #include <asm/pl310.h>
11 #include <config.h>
12
13 struct pl310_regs *const pl310 = (struct pl310_regs *)CFG_SYS_PL310_BASE;
14
pl310_cache_sync(void)15 static void pl310_cache_sync(void)
16 {
17 writel(0, &pl310->pl310_cache_sync);
18 }
19
pl310_background_op_all_ways(u32 * op_reg)20 static void pl310_background_op_all_ways(u32 *op_reg)
21 {
22 u32 assoc_16, associativity, way_mask;
23
24 assoc_16 = readl(&pl310->pl310_aux_ctrl) &
25 PL310_AUX_CTRL_ASSOCIATIVITY_MASK;
26 if (assoc_16)
27 associativity = 16;
28 else
29 associativity = 8;
30
31 way_mask = (1 << associativity) - 1;
32 /* Invalidate all ways */
33 writel(way_mask, op_reg);
34 /* Wait for all ways to be invalidated */
35 while (readl(op_reg) & way_mask)
36 ;
37 pl310_cache_sync();
38 }
39
v7_outer_cache_inval_all(void)40 void v7_outer_cache_inval_all(void)
41 {
42 pl310_background_op_all_ways(&pl310->pl310_inv_way);
43 }
44
v7_outer_cache_flush_all(void)45 void v7_outer_cache_flush_all(void)
46 {
47 pl310_background_op_all_ways(&pl310->pl310_clean_inv_way);
48 }
49
50 /* Flush(clean invalidate) memory from start to stop-1 */
v7_outer_cache_flush_range(u32 start,u32 stop)51 void v7_outer_cache_flush_range(u32 start, u32 stop)
52 {
53 /* PL310 currently supports only 32 bytes cache line */
54 u32 pa, line_size = 32;
55
56 /*
57 * Align to the beginning of cache-line - this ensures that
58 * the first 5 bits are 0 as required by PL310 TRM
59 */
60 start &= ~(line_size - 1);
61
62 for (pa = start; pa < stop; pa = pa + line_size)
63 writel(pa, &pl310->pl310_clean_inv_line_pa);
64
65 pl310_cache_sync();
66 }
67
68 /* invalidate memory from start to stop-1 */
v7_outer_cache_inval_range(u32 start,u32 stop)69 void v7_outer_cache_inval_range(u32 start, u32 stop)
70 {
71 /* PL310 currently supports only 32 bytes cache line */
72 u32 pa, line_size = 32;
73
74 /*
75 * If start address is not aligned to cache-line do not
76 * invalidate the first cache-line
77 */
78 if (start & (line_size - 1)) {
79 printf("ERROR: %s - start address is not aligned - 0x%08x\n",
80 __func__, start);
81 /* move to next cache line */
82 start = (start + line_size - 1) & ~(line_size - 1);
83 }
84
85 /*
86 * If stop address is not aligned to cache-line do not
87 * invalidate the last cache-line
88 */
89 if (stop & (line_size - 1)) {
90 printf("ERROR: %s - stop address is not aligned - 0x%08x\n",
91 __func__, stop);
92 /* align to the beginning of this cache line */
93 stop &= ~(line_size - 1);
94 }
95
96 for (pa = start; pa < stop; pa = pa + line_size)
97 writel(pa, &pl310->pl310_inv_line_pa);
98
99 pl310_cache_sync();
100 }
101