1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2008-2011
4 * Graeme Russ, <graeme.russ@gmail.com>
5 *
6 * (C) Copyright 2002
7 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
8 *
9 * (C) Copyright 2002
10 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
11 *
12 * (C) Copyright 2002
13 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
14 * Marius Groeger <mgroeger@sysgo.de>
15 *
16 * Copyright 2015 ATS Advanced Telematics Systems GmbH
17 * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
18 */
19
20 #include <command.h>
21
22 /*
23 * ARMv7M does not support ARM instruction mode. However, the
24 * interworking BLX and BX instructions do encode the ARM/Thumb
25 * field in bit 0. This means that when executing any Branch
26 * and eXchange instruction we must set bit 0 to one to guarantee
27 * that we keep the processor in Thumb instruction mode. From The
28 * ARMv7-M Instruction Set A4.1.1:
29 * "ARMv7-M only supports the Thumb instruction execution state,
30 * therefore the value of address bit [0] must be 1 in interworking
31 * instructions, otherwise a fault occurs."
32 */
do_go_exec(ulong (* entry)(int,char * const[]),int argc,char * const argv[])33 unsigned long do_go_exec(ulong (*entry)(int, char * const []),
34 int argc, char *const argv[])
35 {
36 ulong addr = (ulong)entry | 1;
37 entry = (void *)addr;
38
39 return entry(argc, argv);
40 }
41