1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Power and Sleep Controller (PSC) functions.
4 *
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
8 */
9
10 #include <asm/arch/hardware.h>
11 #include <asm/io.h>
12
13 /*
14 * The PSC manages three inputs to a "module" which may be a peripheral or
15 * CPU. Those inputs are the module's: clock; reset signal; and sometimes
16 * its power domain. For our purposes, we only care whether clock and power
17 * are active, and the module is out of reset.
18 *
19 * DaVinci chips may include two separate power domains: "Always On" and "DSP".
20 * Chips without a DSP generally have only one domain.
21 *
22 * The "Always On" power domain is always on when the chip is on, and is
23 * powered by the VDD pins (on DM644X). The majority of DaVinci modules
24 * lie within the "Always On" power domain.
25 *
26 * A separate domain called the "DSP" domain houses the C64x+ and other video
27 * hardware such as VICP. In some chips, the "DSP" domain is not always on.
28 * The "DSP" power domain is powered by the CVDDDSP pins (on DM644X).
29 */
30
31 /* Works on Always On power domain only (no PD argument) */
lpsc_transition(unsigned int id,unsigned int state)32 static void lpsc_transition(unsigned int id, unsigned int state)
33 {
34 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
35 struct davinci_psc_regs *psc_regs;
36
37 if (id < DAVINCI_LPSC_PSC1_BASE) {
38 if (id >= PSC_PSC0_MODULE_ID_CNT)
39 return;
40 psc_regs = davinci_psc0_regs;
41 mdstat = &psc_regs->psc0.mdstat[id];
42 mdctl = &psc_regs->psc0.mdctl[id];
43 } else {
44 id -= DAVINCI_LPSC_PSC1_BASE;
45 if (id >= PSC_PSC1_MODULE_ID_CNT)
46 return;
47 psc_regs = davinci_psc1_regs;
48 mdstat = &psc_regs->psc1.mdstat[id];
49 mdctl = &psc_regs->psc1.mdctl[id];
50 }
51 ptstat = &psc_regs->ptstat;
52 ptcmd = &psc_regs->ptcmd;
53
54 while (readl(ptstat) & 0x01)
55 continue;
56
57 if ((readl(mdstat) & PSC_MDSTAT_STATE) == state)
58 return; /* Already in that state */
59
60 writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl);
61 writel(0x01, ptcmd);
62
63 while (readl(ptstat) & 0x01)
64 continue;
65 while ((readl(mdstat) & PSC_MDSTAT_STATE) != state)
66 continue;
67 }
68
lpsc_on(unsigned int id)69 void lpsc_on(unsigned int id)
70 {
71 lpsc_transition(id, 0x03);
72 }
73
lpsc_syncreset(unsigned int id)74 void lpsc_syncreset(unsigned int id)
75 {
76 lpsc_transition(id, 0x01);
77 }
78
lpsc_disable(unsigned int id)79 void lpsc_disable(unsigned int id)
80 {
81 lpsc_transition(id, 0x0);
82 }
83