1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2018 Stefan Roese <sr@denx.de>
4  */
5 
6 #include <event.h>
7 #include <init.h>
8 #include <malloc.h>
9 #include <asm/addrspace.h>
10 #include <asm/global_data.h>
11 #include <linux/bitops.h>
12 #include <linux/io.h>
13 #include <linux/sizes.h>
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
dram_init(void)17 int dram_init(void)
18 {
19 	gd->ram_size = get_ram_size((void *)KSEG1, CONFIG_MAX_MEM_SIZE << 20);
20 
21 	return 0;
22 }
23 
24 #ifndef CONFIG_XPL_BUILD
last_stage_init(void)25 static int last_stage_init(void)
26 {
27 	void *src, *dst;
28 
29 	src = malloc(SZ_64K);
30 	dst = malloc(SZ_64K);
31 	if (!src || !dst) {
32 		printf("Can't allocate buffer for cache cleanup copy!\n");
33 		return 0;
34 	}
35 
36 	/*
37 	 * It has been noticed, that sometimes the d-cache is not in a
38 	 * "clean-state" when U-Boot is running on MT7688. This was
39 	 * detected when using the ethernet driver (which uses d-cache)
40 	 * and a TFTP command does not complete. Copying an area of 64KiB
41 	 * in DDR at a very late bootup time in U-Boot, directly before
42 	 * calling into the prompt, seems to fix this issue.
43 	 */
44 	memcpy(dst, src, SZ_64K);
45 	free(src);
46 	free(dst);
47 
48 	return 0;
49 }
50 EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
51 #endif
52