1// SPDX-License-Identifier: GPL-2.0+ OR X11 2/* 3 * MPC8379E RDB Device Tree Source 4 * 5 * Copyright 2020 NXP 6 */ 7 8/dts-v1/; 9 10/ { 11 compatible = "fsl,mpc8379erdb"; 12 13 #address-cells = <1>; 14 #size-cells = <1>; 15 16 aliases { 17 serial0 = &serial0; 18 serial1 = &serial1; 19 }; 20 21 cpus { 22 #address-cells = <1>; 23 #size-cells = <0>; 24 25 PowerPC,8379@0 { 26 device_type = "cpu"; 27 reg = <0x0>; 28 d-cache-line-size = <32>; 29 i-cache-line-size = <32>; 30 d-cache-size = <32768>; 31 i-cache-size = <32768>; 32 timebase-frequency = <0>; 33 bus-frequency = <0>; 34 clock-frequency = <0>; 35 }; 36 }; 37 38 memory { 39 device_type = "memory"; 40 reg = <0x00000000 0x10000000>; // 256MB at 0 41 }; 42 43 localbus@e0005000 { 44 #address-cells = <2>; 45 #size-cells = <1>; 46 compatible = "fsl,elbc", "simple-bus"; 47 reg = <0xe0005000 0x1000>; 48 interrupts = <77 0x8>; 49 interrupt-parent = <&ipic>; 50 }; 51 52 immr@e0000000 { 53 #address-cells = <1>; 54 #size-cells = <1>; 55 device_type = "soc"; 56 compatible = "simple-bus"; 57 ranges = <0 0xe0000000 0x00100000>; 58 reg = <0xe0000000 0x00000200>; 59 bus-frequency = <0>; 60 61 sdhc@2e000 { 62 compatible = "fsl,esdhc"; 63 reg = <0x2e000 0x1000>; 64 bus-width = <0x4>; 65 clock-frequency = <0>; 66 }; 67 68 serial0: serial@4500 { 69 cell-index = <0>; 70 device_type = "serial"; 71 compatible = "fsl,ns16550", "ns16550"; 72 reg = <0x4500 0x100>; 73 clock-frequency = <333333000>; 74 interrupts = <9 0x8>; 75 interrupt-parent = <&ipic>; 76 bootph-all; 77 }; 78 79 serial1: serial@4600 { 80 cell-index = <1>; 81 device_type = "serial"; 82 compatible = "fsl,ns16550", "ns16550"; 83 reg = <0x4600 0x100>; 84 clock-frequency = <333333000>; 85 interrupts = <10 0x8>; 86 interrupt-parent = <&ipic>; 87 bootph-all; 88 }; 89 90 ipic: interrupt-controller@700 { 91 compatible = "fsl,ipic"; 92 interrupt-controller; 93 #address-cells = <0>; 94 #interrupt-cells = <2>; 95 reg = <0x700 0x100>; 96 device_type = "ipic"; 97 }; 98 99 usb@23000 { 100 compatible = "fsl-usb2-dr"; 101 reg = <0x23000 0x1000>; 102 #address-cells = <1>; 103 #size-cells = <0>; 104 interrupt-parent = <&ipic>; 105 interrupts = <38 0x8>; 106 phy_type = "ulpi"; 107 }; 108 109 enet0: ethernet@24000 { 110 #address-cells = <1>; 111 #size-cells = <1>; 112 cell-index = <0>; 113 device_type = "network"; 114 model = "eTSEC"; 115 compatible = "fsl,etsec2"; 116 reg = <0x24000 0x1000>; 117 ranges = <0x0 0x24000 0x1000>; 118 local-mac-address = [ 00 00 00 00 00 00 ]; 119 interrupts = <32 0x8 33 0x8 34 0x8>; 120 phy-connection-type = "mii"; 121 interrupt-parent = <&ipic>; 122 fixed-link = <1 0 1000 0 0>; 123 phy-handle = <&phy>; 124 fsl,magic-packet; 125 126 mdio@520 { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 compatible = "fsl,etsec2-mdio"; 130 reg = <0x520 0x20>; 131 132 phy: ethernet-phy@2 { 133 interrupt-parent = <&ipic>; 134 interrupts = <17 0x8>; 135 reg = <0x2>; 136 device_type = "ethernet-phy"; 137 }; 138 }; 139 }; 140 141 pci0: pci@e0008300 { 142 #address-cells = <3>; 143 #size-cells = <2>; 144 #interrupt-cells = <1>; 145 device_type = "pci"; 146 reg = <0x0 0xe0008300 0x0 0x00000fff>; 147 compatible = "fsl,mpc837x-pci"; 148 clock-frequency = <0>; 149 }; 150 151 }; 152 153}; 154