1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
4 * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
5 *
6 * U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT).
7 * The CLINT block holds memory-mapped control and status registers
8 * associated with software and timer interrupts.
9 */
10
11 #include <dm.h>
12 #include <regmap.h>
13 #include <syscon.h>
14 #include <asm/global_data.h>
15 #include <asm/io.h>
16 #include <asm/smp.h>
17 #include <asm/syscon.h>
18 #include <linux/err.h>
19
20 /* MSIP registers */
21 #define MSIP_REG(base, hart) ((ulong)(base) + (hart) * 4)
22
23 DECLARE_GLOBAL_DATA_PTR;
24
riscv_init_ipi(void)25 int riscv_init_ipi(void)
26 {
27 int ret;
28 struct udevice *dev;
29
30 ret = uclass_get_device_by_driver(UCLASS_TIMER,
31 DM_DRIVER_GET(riscv_aclint_timer), &dev);
32 if (ret == -ENODEV)
33 ret = uclass_get_device_by_driver(UCLASS_SYSCON,
34 DM_DRIVER_GET(riscv_aclint_swi), &dev);
35
36 if (ret)
37 return ret;
38
39 if (dev_get_driver_data(dev) != 0)
40 gd->arch.aclint = dev_read_addr_ptr(dev);
41 else
42 gd->arch.aclint = syscon_get_first_range(RISCV_SYSCON_ACLINT);
43
44 if (!gd->arch.aclint)
45 return -EINVAL;
46
47 return 0;
48 }
49
riscv_send_ipi(int hart)50 int riscv_send_ipi(int hart)
51 {
52 writel(1, (void __iomem *)MSIP_REG(gd->arch.aclint, hart));
53
54 return 0;
55 }
56
riscv_clear_ipi(int hart)57 int riscv_clear_ipi(int hart)
58 {
59 writel(0, (void __iomem *)MSIP_REG(gd->arch.aclint, hart));
60
61 return 0;
62 }
63
riscv_get_ipi(int hart,int * pending)64 int riscv_get_ipi(int hart, int *pending)
65 {
66 *pending = readl((void __iomem *)MSIP_REG(gd->arch.aclint, hart));
67
68 return 0;
69 }
70
71 static const struct udevice_id riscv_aclint_swi_ids[] = {
72 { .compatible = "riscv,aclint-mswi", .data = RISCV_SYSCON_ACLINT },
73 { .compatible = "thead,c900-clint", .data = RISCV_SYSCON_ACLINT },
74 { }
75 };
76
77 U_BOOT_DRIVER(riscv_aclint_swi) = {
78 .name = "riscv_aclint_swi",
79 .id = UCLASS_SYSCON,
80 .of_match = riscv_aclint_swi_ids,
81 .flags = DM_FLAG_PRE_RELOC,
82 };
83