1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2016-17 Microsemi Corporation.
4  * Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
5  *
6  * Copyright (C) 2017 Andes Technology Corporation
7  * Rick Chen, Andes Technology Corporation <rick@andestech.com>
8  *
9  * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
10  */
11 
12 #include <linux/compat.h>
13 #include <efi_loader.h>
14 #include <hang.h>
15 #include <interrupt.h>
16 #include <irq_func.h>
17 #include <asm/global_data.h>
18 #include <asm/ptrace.h>
19 #include <asm/system.h>
20 #include <asm/encoding.h>
21 #include <semihosting.h>
22 
23 DECLARE_GLOBAL_DATA_PTR;
24 
set_resume(struct resume_data * data)25 void set_resume(struct resume_data *data)
26 {
27 	gd->arch.resume = data;
28 }
29 
show_efi_loaded_images(uintptr_t epc)30 static void show_efi_loaded_images(uintptr_t epc)
31 {
32 	efi_print_image_infos((void *)epc);
33 }
34 
show_regs(struct pt_regs * regs)35 static void __maybe_unused show_regs(struct pt_regs *regs)
36 {
37 	printf("\nSP:  " REG_FMT " GP:  " REG_FMT " TP:  " REG_FMT "\n",
38 	       regs->sp, regs->gp, regs->tp);
39 	printf("T0:  " REG_FMT " T1:  " REG_FMT " T2:  " REG_FMT "\n",
40 	       regs->t0, regs->t1, regs->t2);
41 	printf("S0:  " REG_FMT " S1:  " REG_FMT " A0:  " REG_FMT "\n",
42 	       regs->s0, regs->s1, regs->a0);
43 	printf("A1:  " REG_FMT " A2:  " REG_FMT " A3:  " REG_FMT "\n",
44 	       regs->a1, regs->a2, regs->a3);
45 	printf("A4:  " REG_FMT " A5:  " REG_FMT " A6:  " REG_FMT "\n",
46 	       regs->a4, regs->a5, regs->a6);
47 	printf("A7:  " REG_FMT " S2:  " REG_FMT " S3:  " REG_FMT "\n",
48 	       regs->a7, regs->s2, regs->s3);
49 	printf("S4:  " REG_FMT " S5:  " REG_FMT " S6:  " REG_FMT "\n",
50 	       regs->s4, regs->s5, regs->s6);
51 	printf("S7:  " REG_FMT " S8:  " REG_FMT " S9:  " REG_FMT "\n",
52 	       regs->s7, regs->s8, regs->s9);
53 	printf("S10: " REG_FMT " S11: " REG_FMT " T3:  " REG_FMT "\n",
54 	       regs->s10, regs->s11, regs->t3);
55 	printf("T4:  " REG_FMT " T5:  " REG_FMT " T6:  " REG_FMT "\n",
56 	       regs->t4, regs->t5, regs->t6);
57 }
58 
show_backtrace(struct pt_regs * regs)59 static void __maybe_unused show_backtrace(struct pt_regs *regs)
60 {
61 	uintptr_t *fp = (uintptr_t *)regs->s0;
62 	unsigned count = 0;
63 	ulong ra;
64 
65 	printf("\nbacktrace:\n");
66 
67 	/* there are a few entry points where the s0 register is
68 	 * set to gd, so to avoid changing those, just abort if
69 	 * the value is the same */
70 	while (fp != NULL && fp != (uintptr_t *)gd) {
71 		ra = fp[-1];
72 		printf("%3d: FP: " REG_FMT " RA: " REG_FMT,
73 		       count, (ulong)fp, ra);
74 
75 		if (gd && gd->flags & GD_FLG_RELOC)
76 			printf(" - RA: " REG_FMT " reloc adjusted\n",
77 			ra - gd->reloc_off);
78 		else
79 			printf("\n");
80 
81 		fp = (uintptr_t *)fp[-2];
82 		count++;
83 	}
84 }
85 
86 /**
87  * instr_len() - get instruction length
88  *
89  * @i:		low 16 bits of the instruction
90  * Return:	number of u16 in instruction
91  */
instr_len(u16 i)92 static int instr_len(u16 i)
93 {
94 	if ((i & 0x03) != 0x03)
95 		return 1;
96 	/* Instructions with more than 32 bits are not yet specified */
97 	return 2;
98 }
99 
100 /**
101  * show_code() - display code leading to exception
102  *
103  * @epc:	program counter
104  */
show_code(ulong epc)105 static void show_code(ulong epc)
106 {
107 	u16 *pos = (u16 *)(epc & ~1UL);
108 	int i, len = instr_len(*pos);
109 
110 	printf("\nCode: ");
111 	for (i = -8; i; ++i)
112 		printf("%04x ", pos[i]);
113 	printf("(");
114 	for (i = 0; i < len; ++i)
115 		printf("%04x%s", pos[i], i + 1 == len ? ")\n" : " ");
116 }
117 
_exit_trap(ulong code,ulong epc,ulong tval,struct pt_regs * regs)118 static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs)
119 {
120 	static const char * const exception_code[] = {
121 		"Instruction address misaligned",
122 		"Instruction access fault",
123 		"Illegal instruction",
124 		"Breakpoint",
125 		"Load address misaligned",
126 		"Load access fault",
127 		"Store/AMO address misaligned",
128 		"Store/AMO access fault",
129 		"Environment call from U-mode",
130 		"Environment call from S-mode",
131 		"Reserved",
132 		"Environment call from M-mode",
133 		"Instruction page fault",
134 		"Load page fault",
135 		"Reserved",
136 		"Store/AMO page fault",
137 	};
138 
139 	if (gd->arch.resume) {
140 		gd->arch.resume->code = code;
141 		longjmp(gd->arch.resume->jump, 1);
142 	}
143 
144 	if (code < ARRAY_SIZE(exception_code))
145 		printf("Unhandled exception: %s\n", exception_code[code]);
146 	else
147 		printf("Unhandled exception code: %ld\n", code);
148 
149 	printf("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n",
150 	       epc, regs->ra, tval);
151 	/* Print relocation adjustments, but only if gd is initialized */
152 	if (gd && gd->flags & GD_FLG_RELOC)
153 		printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n",
154 		       epc - gd->reloc_off, regs->ra - gd->reloc_off);
155 
156 	if (CONFIG_IS_ENABLED(SHOW_REGS))
157 		show_regs(regs);
158 	if (CONFIG_IS_ENABLED(FRAMEPOINTER))
159 		show_backtrace(regs);
160 	show_code(epc);
161 	show_efi_loaded_images(epc);
162 	panic("\n");
163 }
164 
interrupt_init(void)165 int interrupt_init(void)
166 {
167 	return 0;
168 }
169 
170 /*
171  * enable interrupts
172  */
enable_interrupts(void)173 void enable_interrupts(void)
174 {
175 }
176 
177 /*
178  * disable interrupts
179  */
disable_interrupts(void)180 int disable_interrupts(void)
181 {
182 	return 0;
183 }
184 
handle_trap(ulong cause,ulong epc,ulong tval,struct pt_regs * regs)185 ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs)
186 {
187 	ulong is_irq, irq;
188 
189 	/* An UEFI application may have changed gd. Restore U-Boot's gd. */
190 	efi_restore_gd();
191 
192 	if (cause == CAUSE_BREAKPOINT &&
193 	    CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)) {
194 		ulong pre_addr = epc - 4, post_addr = epc + 4;
195 
196 		/* Check for prior and post addresses to be in same page. */
197 		if ((pre_addr & ~(PAGE_SIZE - 1)) ==
198 			(post_addr & ~(PAGE_SIZE - 1))) {
199 			u32 pre = *(u32 *)pre_addr;
200 			u32 post = *(u32 *)post_addr;
201 
202 			/* Check for semihosting, i.e.:
203 			 * slli    zero,zero,0x1f
204 			 * ebreak
205 			 * srai    zero,zero,0x7
206 			 */
207 			if (pre == 0x01f01013 && post == 0x40705013) {
208 				disable_semihosting();
209 				epc += 4;
210 				return epc;
211 			}
212 		}
213 	}
214 
215 	is_irq = (cause & MCAUSE_INT);
216 	irq = (cause & ~MCAUSE_INT);
217 
218 	if (is_irq) {
219 		switch (irq) {
220 		case IRQ_M_EXT:
221 		case IRQ_S_EXT:
222 			external_interrupt(0);	/* handle external interrupt */
223 			break;
224 		case IRQ_M_TIMER:
225 		case IRQ_S_TIMER:
226 			timer_interrupt(0);	/* handle timer interrupt */
227 			break;
228 		default:
229 			_exit_trap(cause, epc, tval, regs);
230 			break;
231 		};
232 	} else {
233 		_exit_trap(cause, epc, tval, regs);
234 	}
235 
236 	return epc;
237 }
238 
239 /*
240  *Entry Point for PLIC Interrupt Handler
241  */
external_interrupt(struct pt_regs * regs)242 __attribute__((weak)) void external_interrupt(struct pt_regs *regs)
243 {
244 }
245 
timer_interrupt(struct pt_regs * regs)246 __attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
247 {
248 }
249