1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019 Intel Corporation <www.intel.com>
4  */
5 
6 #include <cpu_func.h>
7 #include <init.h>
8 #include <log.h>
9 #include <asm/arch/slimbootloader.h>
10 #include <asm/global_data.h>
11 
12 DECLARE_GLOBAL_DATA_PTR;
13 
14 /**
15  * This sets tsc_base and clock_rate for early_timer and tsc_timer.
16  * The performance info guid hob has all performance timestamp data, but
17  * the only tsc frequency info is used for the timer driver for now.
18  *
19  * Slim Bootloader already calibrated TSC and provides it to U-Boot.
20  * Therefore, U-Boot does not have to re-calibrate TSC.
21  * Configuring tsc_base and clock_rate here makes x86 tsc_timer driver
22  * bypass TSC calibration and use the provided TSC frequency.
23  */
tsc_init(void)24 static void tsc_init(void)
25 {
26 	struct sbl_performance_info *data;
27 	const efi_guid_t guid = SBL_PERFORMANCE_INFO_GUID;
28 
29 	if (!gd->arch.hob_list)
30 		panic("hob list not found!");
31 
32 	gd->arch.tsc_base = rdtsc();
33 	debug("tsc_base=0x%llx\n", gd->arch.tsc_base);
34 
35 	data = hob_get_guid_hob_data(gd->arch.hob_list, NULL, &guid);
36 	if (!data) {
37 		debug("performance info hob not found\n");
38 		return;
39 	}
40 
41 	/* frequency is in KHz, so to Hz */
42 	gd->arch.clock_rate = data->frequency * 1000;
43 	debug("freq=0x%lx\n", gd->arch.clock_rate);
44 }
45 
arch_cpu_init(void)46 int arch_cpu_init(void)
47 {
48 	tsc_init();
49 
50 	return x86_cpu_init_f();
51 }
52 
checkcpu(void)53 int checkcpu(void)
54 {
55 	return 0;
56 }
57