1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7 #ifndef __ASM_GBL_DATA_H 8 #define __ASM_GBL_DATA_H 9 10 #ifndef __ASSEMBLY__ 11 12 #include <linux/types.h> 13 #include <asm/processor.h> 14 #include <asm/mrccache.h> 15 #include <asm/u-boot.h> 16 17 enum pei_boot_mode_t { 18 PEI_BOOT_NONE = 0, 19 PEI_BOOT_SOFT_RESET, 20 PEI_BOOT_RESUME, 21 22 }; 23 24 struct dimm_info { 25 uint32_t dimm_size; 26 uint16_t ddr_type; 27 uint16_t ddr_frequency; 28 uint8_t rank_per_dimm; 29 uint8_t channel_num; 30 uint8_t dimm_num; 31 uint8_t bank_locator; 32 /* The 5th byte is '\0' for the end of string */ 33 uint8_t serial[5]; 34 /* The 19th byte is '\0' for the end of string */ 35 uint8_t module_part_number[19]; 36 uint16_t mod_id; 37 uint8_t mod_type; 38 uint8_t bus_width; 39 } __packed; 40 41 struct pei_memory_info { 42 uint8_t dimm_cnt; 43 /* Maximum num of dimm is 8 */ 44 struct dimm_info dimm[8]; 45 } __packed; 46 47 struct memory_area { 48 uint64_t start; 49 uint64_t size; 50 }; 51 52 struct memory_info { 53 int num_areas; 54 uint64_t total_memory; 55 uint64_t total_32bit_memory; 56 struct memory_area area[CONFIG_NR_DRAM_BANKS]; 57 }; 58 59 #define MAX_MTRR_REQUESTS 8 60 61 /** 62 * A request for a memory region to be set up in a particular way. These 63 * requests are processed before board_init_r() is called. They are generally 64 * optional and can be ignored with some performance impact. 65 */ 66 struct mtrr_request { 67 int type; /* MTRR_TYPE_... */ 68 uint64_t start; 69 uint64_t size; 70 }; 71 72 /** 73 * struct mrc_output - holds the MRC data 74 * 75 * @buf: MRC training data to save for the next boot. This is set to point to 76 * the raw data after SDRAM init is complete. Then mrccache_setup() 77 * turns it into a proper cache record with a checksum 78 * @len: Length of @buf 79 * @cache: Resulting cache record 80 */ 81 struct mrc_output { 82 char *buf; 83 uint len; 84 struct mrc_data_container *cache; 85 }; 86 87 /* Architecture-specific global data */ 88 struct arch_global_data { 89 u64 gdt[X86_GDT_NUM_ENTRIES] __aligned(16); 90 struct global_data *gd_addr; /* Location of Global Data */ 91 uint8_t x86; /* CPU family */ 92 uint8_t x86_vendor; /* CPU vendor */ 93 uint8_t x86_model; 94 uint8_t x86_mask; 95 uint32_t x86_device; 96 uint64_t tsc_base; /* Initial value returned by rdtsc() */ 97 bool tsc_inited; /* true if tsc is ready for use */ 98 unsigned long clock_rate; /* Clock rate of timer in Hz */ 99 void *new_fdt; /* Relocated FDT */ 100 uint32_t bist; /* Built-in self test value */ 101 enum pei_boot_mode_t pei_boot_mode; 102 const struct pch_gpio_map *gpio_map; /* board GPIO map */ 103 struct memory_info meminfo; /* Memory information */ 104 struct pei_memory_info pei_meminfo; /* PEI memory information */ 105 #ifdef CONFIG_USE_HOB 106 void *hob_list; /* FSP HOB list */ 107 #endif 108 struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS]; 109 int mtrr_req_count; 110 int has_mtrr; 111 /* MRC training data */ 112 struct mrc_output mrc[MRC_TYPE_COUNT]; 113 ulong table; /* Table pointer from previous loader */ 114 int turbo_state; /* Current turbo state */ 115 struct irq_routing_table *pirq_routing_table; 116 int dw_i2c_num_cards; /* Used by designware i2c driver */ 117 #ifdef CONFIG_SEABIOS 118 u32 high_table_ptr; 119 u32 high_table_limit; 120 #endif 121 int prev_sleep_state; /* Previous sleep state ACPI_S0/1../5 */ 122 ulong backup_mem; /* Backup memory address for S3 */ 123 #ifdef CONFIG_FSP_VERSION2 124 struct fsp_header *fsp_s_hdr; /* Pointer to FSP-S header */ 125 #endif 126 void *itss_priv; /* Private ITSS data pointer */ 127 ulong coreboot_table; /* Address of coreboot table */ 128 ulong table_start; /* Start address of x86 tables */ 129 ulong table_end; /* End address of x86 tables */ 130 ulong table_start_high; /* Start address of high x86 tables */ 131 ulong table_end_high; /* End address of high x86 tables */ 132 ulong smbios_start; /* Start address of SMBIOS table */ 133 }; 134 135 #endif 136 137 #include <asm-generic/global_data.h> 138 139 #ifndef __ASSEMBLY__ 140 # if defined(CONFIG_EFI_APP) || CONFIG_IS_ENABLED(X86_64) 141 142 /* TODO(sjg@chromium.org): Consider using a fixed register for gd on x86_64 */ 143 #define gd global_data_ptr 144 145 #define DECLARE_GLOBAL_DATA_PTR extern struct global_data *global_data_ptr 146 # else get_fs_gd_ptr(void)147static inline notrace gd_t *get_fs_gd_ptr(void) 148 { 149 gd_t *gd_ptr; 150 151 #if CONFIG_IS_ENABLED(X86_64) 152 asm volatile("fs mov 0, %0\n" : "=r" (gd_ptr)); 153 #else 154 asm volatile("fs movl 0, %0\n" : "=r" (gd_ptr)); 155 #endif 156 157 return gd_ptr; 158 } 159 160 #define gd get_fs_gd_ptr() 161 162 #define DECLARE_GLOBAL_DATA_PTR 163 # endif 164 165 #endif 166 167 #endif /* __ASM_GBL_DATA_H */ 168