1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * (C) Copyright 2000-2002
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 */
6
7 #ifndef _ASM_IO_H
8 #define _ASM_IO_H
9
10 #include <compiler.h>
11
12 /*
13 * This file contains the definitions for the x86 IO instructions
14 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
15 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
16 * versions of the single-IO instructions (inb_p/inw_p/..).
17 *
18 * This file is not meant to be obfuscating: it's just complicated
19 * to (a) handle it all in a way that makes gcc able to optimize it
20 * as well as possible and (b) trying to avoid writing the same thing
21 * over and over again with slight variations and possibly making a
22 * mistake somewhere.
23 */
24
25 /*
26 * Thanks to James van Artsdalen for a better timing-fix than
27 * the two short jumps: using outb's to a nonexistent port seems
28 * to guarantee better timings even on fast machines.
29 *
30 * On the other hand, I'd like to be sure of a non-existent port:
31 * I feel a bit unsafe about using 0x80 (should be safe, though)
32 *
33 * Linus
34 */
35
36 /*
37 * Bit simplified and optimized by Jan Hubicka
38 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
39 *
40 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
41 * isa_read[wl] and isa_write[wl] fixed
42 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
43 */
44
45 #define IO_SPACE_LIMIT 0xffff
46
47 #include <asm/types.h>
48
49 #ifdef __KERNEL__
50
51 /*
52 * readX/writeX() are used to access memory mapped devices. On some
53 * architectures the memory mapped IO stuff needs to be accessed
54 * differently. On the x86 architecture, we just read/write the
55 * memory location directly.
56 */
57
58 #define readb(addr) (*(volatile u8 *)(uintptr_t)(addr))
59 #define readw(addr) (*(volatile u16 *)(uintptr_t)(addr))
60 #define readl(addr) (*(volatile u32 *)(uintptr_t)(addr))
61 #define readq(addr) (*(volatile u64 *)(uintptr_t)(addr))
62 #define __raw_readb readb
63 #define __raw_readw readw
64 #define __raw_readl readl
65 #define __raw_readq readq
66
67 #define writeb(b, addr) (*(volatile u8 *)(addr) = (b))
68 #define writew(b, addr) (*(volatile u16 *)(addr) = (b))
69 #define writel(b, addr) (*(volatile u32 *)(addr) = (b))
70 #define writeq(b, addr) (*(volatile u64 *)(addr) = (b))
71 #define __raw_writeb writeb
72 #define __raw_writew writew
73 #define __raw_writel writel
74 #define __raw_writeq writeq
75
76 #define memset_io(a,b,c) memset((a),(b),(c))
77 #define memcpy_fromio(a,b,c) memcpy((a),(b),(c))
78 #define memcpy_toio(a,b,c) memcpy((a),(b),(c))
79
80 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
81 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
82
83 #define out_le64(a, v) out_arch(q, le64, a, v)
84 #define out_le32(a, v) out_arch(l, le32, a, v)
85 #define out_le16(a, v) out_arch(w, le16, a, v)
86
87 #define in_le64(a) in_arch(q, le64, a)
88 #define in_le32(a) in_arch(l, le32, a)
89 #define in_le16(a) in_arch(w, le16, a)
90
91 #define out_be32(a, v) out_arch(l, be32, a, v)
92 #define out_be16(a, v) out_arch(w, be16, a, v)
93
94 #define in_be32(a) in_arch(l, be32, a)
95 #define in_be16(a) in_arch(w, be16, a)
96
97 #define out_8(a, v) __raw_writeb(v, a)
98 #define in_8(a) __raw_readb(a)
99
100 #define clrbits(type, addr, clear) \
101 out_##type((addr), in_##type(addr) & ~(clear))
102
103 #define setbits(type, addr, set) \
104 out_##type((addr), in_##type(addr) | (set))
105
106 #define clrsetbits(type, addr, clear, set) \
107 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
108
109 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
110 #define setbits_be32(addr, set) setbits(be32, addr, set)
111 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
112
113 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
114 #define setbits_le32(addr, set) setbits(le32, addr, set)
115 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
116
117 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
118 #define setbits_be16(addr, set) setbits(be16, addr, set)
119 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
120
121 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
122 #define setbits_le16(addr, set) setbits(le16, addr, set)
123 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
124
125 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
126 #define setbits_8(addr, set) setbits(8, addr, set)
127 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
128
129 #endif /* __KERNEL__ */
130
131 #ifdef SLOW_IO_BY_JUMPING
132 #define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
133 #else
134 #define __SLOW_DOWN_IO "\noutb %%al,$0xed"
135 #endif
136
137 #ifdef REALLY_SLOW_IO
138 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
139 #else
140 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
141 #endif
142
143 /*
144 * Talk about misusing macros..
145 */
146 #define __OUT1(s,x) \
147 static inline void _out##s(unsigned x value, unsigned short port) {
148
149 #define __OUT2(s,s1,s2) \
150 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
151
152 #define __OUT(s,s1,x) \
153 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
154 __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));}
155
156 #define __IN1(s) \
157 static inline RETURN_TYPE _in##s(unsigned short port) { RETURN_TYPE _v;
158
159 #define __IN2(s,s1,s2) \
160 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
161
162 #define __IN(s,s1,i...) \
163 __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
164 __IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; }
165
166 #define __INS(s) \
167 static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
168 { __asm__ __volatile__ ("rep ; ins" #s \
169 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
170
171 #define __OUTS(s) \
172 static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
173 { __asm__ __volatile__ ("rep ; outs" #s \
174 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
175
176 #define RETURN_TYPE unsigned char
177 __IN(b,"")
178 #undef RETURN_TYPE
179 #define RETURN_TYPE unsigned short
180 __IN(w,"")
181 #undef RETURN_TYPE
182 #define RETURN_TYPE unsigned int
183 __IN(l,"")
184 #undef RETURN_TYPE
185
186 #define inb(port) _inb((uintptr_t)(port))
187 #define inw(port) _inw((uintptr_t)(port))
188 #define inl(port) _inl((uintptr_t)(port))
189
190 __OUT(b,"b",char)
191 __OUT(w,"w",short)
192 __OUT(l,,int)
193
194 #define outb(val, port) _outb(val, (uintptr_t)(port))
195 #define outw(val, port) _outw(val, (uintptr_t)(port))
196 #define outl(val, port) _outl(val, (uintptr_t)(port))
197
__INS(b)198 __INS(b)
199 __INS(w)
200 __INS(l)
201 #define insb insb
202 #define insw insw
203 #define insl insl
204
205 __OUTS(b)
206 __OUTS(w)
207 __OUTS(l)
208 #define outsb outsb
209 #define outsw outsw
210 #define outsl outsl
211
212 /* IO space accessors */
213 #define clrio(type, addr, clear) \
214 out##type(in##type(addr) & ~(clear), (addr))
215
216 #define setio(type, addr, set) \
217 out##type(in##type(addr) | (set), (addr))
218
219 #define clrsetio(type, addr, clear, set) \
220 out##type((in##type(addr) & ~(clear)) | (set), (addr))
221
222 #define clrio_32(addr, clear) clrio(l, addr, clear)
223 #define clrio_16(addr, clear) clrio(w, addr, clear)
224 #define clrio_8(addr, clear) clrio(b, addr, clear)
225
226 #define setio_32(addr, set) setio(l, addr, set)
227 #define setio_16(addr, set) setio(w, addr, set)
228 #define setio_8(addr, set) setio(b, addr, set)
229
230 #define clrsetio_32(addr, clear, set) clrsetio(l, addr, clear, set)
231 #define clrsetio_16(addr, clear, set) clrsetio(w, addr, clear, set)
232 #define clrsetio_8(addr, clear, set) clrsetio(b, addr, clear, set)
233
234 static inline void sync(void)
235 {
236 }
237
238 /*
239 * TODO: The kernel offers some more advanced versions of barriers, it might
240 * have some advantages to use them instead of the simple one here.
241 */
242 #define dmb() __asm__ __volatile__ ("" : : : "memory")
243 #define mb() __asm__ __volatile__ ("mfence" : : : "memory")
244 #define __iormb() dmb()
245 #define __iowmb() dmb()
246
247 /*
248 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
249 * access or a MMIO access, these functions don't care. The info is
250 * encoded in the hardware mapping set up by the mapping functions
251 * (or the cookie itself, depending on implementation and hw).
252 *
253 * The generic routines don't assume any hardware mappings, and just
254 * encode the PIO/MMIO as part of the cookie. They coldly assume that
255 * the MMIO IO mappings are not in the low address range.
256 *
257 * Architectures for which this is not true can't use this generic
258 * implementation and should do their own copy.
259 */
260
261 /*
262 * We assume that all the low physical PIO addresses (0-0xffff) always
263 * PIO. That means we can do some sanity checks on the low bits, and
264 * don't need to just take things for granted.
265 */
266 #define PIO_RESERVED 0x10000UL
267
268 /*
269 * Ugly macros are a way of life.
270 */
271 #define IO_COND(addr, is_pio, is_mmio) do { \
272 unsigned long port = (unsigned long __force)addr; \
273 if (port >= PIO_RESERVED) { \
274 is_mmio; \
275 } else { \
276 is_pio; \
277 } \
278 } while (0)
279
ioread8(const volatile void __iomem * addr)280 static inline u8 ioread8(const volatile void __iomem *addr)
281 {
282 IO_COND(addr, return inb(port), return readb(addr));
283 return 0xff;
284 }
285
ioread16(const volatile void __iomem * addr)286 static inline u16 ioread16(const volatile void __iomem *addr)
287 {
288 IO_COND(addr, return inw(port), return readw(addr));
289 return 0xffff;
290 }
291
ioread32(const volatile void __iomem * addr)292 static inline u32 ioread32(const volatile void __iomem *addr)
293 {
294 IO_COND(addr, return inl(port), return readl(addr));
295 return 0xffffffff;
296 }
297
iowrite8(u8 value,volatile void __iomem * addr)298 static inline void iowrite8(u8 value, volatile void __iomem *addr)
299 {
300 IO_COND(addr, outb(value, port), writeb(value, addr));
301 }
302
iowrite16(u16 value,volatile void __iomem * addr)303 static inline void iowrite16(u16 value, volatile void __iomem *addr)
304 {
305 IO_COND(addr, outw(value, port), writew(value, addr));
306 }
307
iowrite32(u32 value,volatile void __iomem * addr)308 static inline void iowrite32(u32 value, volatile void __iomem *addr)
309 {
310 IO_COND(addr, outl(value, port), writel(value, addr));
311 }
312
313 #include <asm-generic/io.h>
314
315 #endif /* _ASM_IO_H */
316