1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 */
9
10 #include <config.h>
11 #include <init.h>
12 #include <asm/global_data.h>
13 #include <asm/immap.h>
14 #include <asm/io.h>
15 #include <linux/delay.h>
16
17 DECLARE_GLOBAL_DATA_PTR;
18
checkboard(void)19 int checkboard(void)
20 {
21 puts("Board: ");
22 puts("Freescale FireEngine 5329 EVB\n");
23 return 0;
24 };
25
dram_init(void)26 int dram_init(void)
27 {
28 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
29 u32 dramsize, i;
30
31 dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
32
33 for (i = 0x13; i < 0x20; i++) {
34 if (dramsize == (1 << i))
35 break;
36 }
37 i--;
38
39 out_be32(&sdram->cs0, CFG_SYS_SDRAM_BASE | i);
40 out_be32(&sdram->cfg1, CFG_SYS_SDRAM_CFG1);
41 out_be32(&sdram->cfg2, CFG_SYS_SDRAM_CFG2);
42
43 /* Issue PALL */
44 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
45
46 /* Issue LEMR */
47 out_be32(&sdram->mode, CFG_SYS_SDRAM_EMOD);
48 out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE | 0x04000000);
49
50 udelay(500);
51
52 /* Issue PALL */
53 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
54
55 /* Perform two refresh cycles */
56 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
57 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
58
59 out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE);
60
61 out_be32(&sdram->ctrl,
62 (CFG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
63
64 udelay(100);
65
66 gd->ram_size = dramsize;
67
68 return 0;
69 };
70
testdram(void)71 int testdram(void)
72 {
73 /* TODO: XXX XXX XXX */
74 printf("DRAM test not implemented!\n");
75
76 return (0);
77 }
78