1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright 2014 Freescale Semiconductor, Inc.
3 */
4
5 #include <config.h>
6 #include <clock_legacy.h>
7 #include <console.h>
8 #include <env_internal.h>
9 #include <init.h>
10 #include <malloc.h>
11 #include <ns16550.h>
12 #include <nand.h>
13 #include <i2c.h>
14 #include <mmc.h>
15 #include <fsl_esdhc.h>
16 #include <spi_flash.h>
17 #include <asm/global_data.h>
18 #include "../common/sleep.h"
19 #include "../common/spl.h"
20
21 DECLARE_GLOBAL_DATA_PTR;
22
get_effective_memsize(void)23 phys_size_t get_effective_memsize(void)
24 {
25 return CONFIG_SYS_L3_SIZE;
26 }
27
28 #if defined(CONFIG_SPL_MMC_BOOT)
29 #define GPIO1_SD_SEL 0x00020000
board_mmc_getcd(struct mmc * mmc)30 int board_mmc_getcd(struct mmc *mmc)
31 {
32 ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
33 u32 val = in_be32(&pgpio->gpdat);
34
35 /* GPIO1_14, 0: eMMC, 1: SD */
36 val &= GPIO1_SD_SEL;
37
38 return val ? -1 : 1;
39 }
40
board_mmc_getwp(struct mmc * mmc)41 int board_mmc_getwp(struct mmc *mmc)
42 {
43 ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
44 u32 val = in_be32(&pgpio->gpdat);
45
46 val &= GPIO1_SD_SEL;
47
48 return val ? -1 : 0;
49 }
50 #endif
51
board_init_f(ulong bootflag)52 void board_init_f(ulong bootflag)
53 {
54 u32 plat_ratio, sys_clk, ccb_clk;
55 ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
56
57 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
58 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
59
60 /* Update GD pointer */
61 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
62
63 console_init_f();
64
65 #ifdef CONFIG_DEEP_SLEEP
66 /* disable the console if boot from deep sleep */
67 if (is_warm_boot())
68 fsl_dp_disable_console();
69 #endif
70
71 /* initialize selected port with appropriate baud rate */
72 sys_clk = get_board_sys_clk();
73 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
74 ccb_clk = sys_clk * plat_ratio / 2;
75
76 ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
77 ccb_clk / 16 / CONFIG_BAUDRATE);
78
79 #if defined(CONFIG_SPL_MMC_BOOT)
80 puts("\nSD boot...\n");
81 #elif defined(CONFIG_SPL_SPI_BOOT)
82 puts("\nSPI boot...\n");
83 #elif defined(CONFIG_SPL_NAND_BOOT)
84 puts("\nNAND boot...\n");
85 #endif
86
87 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
88 }
89
board_init_r(gd_t * gd,ulong dest_addr)90 void board_init_r(gd_t *gd, ulong dest_addr)
91 {
92 struct bd_info *bd;
93
94 bd = (struct bd_info *)(gd + sizeof(gd_t));
95 memset(bd, 0, sizeof(struct bd_info));
96 gd->bd = bd;
97
98 arch_cpu_init();
99 get_clocks();
100 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
101 CONFIG_SPL_RELOC_MALLOC_SIZE);
102 gd->flags |= GD_FLG_FULL_MALLOC_INIT;
103
104 #ifdef CONFIG_SPL_NAND_BOOT
105 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
106 (uchar *)SPL_ENV_ADDR);
107 #endif
108 #ifdef CONFIG_SPL_MMC_BOOT
109 mmc_initialize(bd);
110 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
111 (uchar *)SPL_ENV_ADDR);
112 #endif
113 #ifdef CONFIG_SPL_SPI_BOOT
114 fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
115 (uchar *)SPL_ENV_ADDR);
116 #endif
117
118 gd->env_addr = (ulong)(SPL_ENV_ADDR);
119 gd->env_valid = ENV_VALID;
120
121 i2c_init_all();
122
123 dram_init();
124
125 #ifdef CONFIG_SPL_MMC_BOOT
126 mmc_boot();
127 #elif defined(CONFIG_SPL_SPI_BOOT)
128 fsl_spi_boot();
129 #elif defined(CONFIG_SPL_NAND_BOOT)
130 nand_boot();
131 #endif
132 }
133