1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2017 General Electric Company
4 *
5 * Based on board/freescale/mx53loco/mx53loco.c:
6 *
7 * Copyright (C) 2011 Freescale Semiconductor, Inc.
8 * Jason Liu <r64343@freescale.com>
9 */
10
11 #include <init.h>
12 #include <asm/global_data.h>
13 #include <asm/io.h>
14 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/sys_proto.h>
16 #include <asm/arch/crm_regs.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/iomux-mx53.h>
19 #include <asm/arch/clock.h>
20 #include <env.h>
21 #include <linux/errno.h>
22 #include <linux/libfdt.h>
23 #include <asm/mach-imx/mxc_i2c.h>
24 #include <asm/mach-imx/mx5_video.h>
25 #include <netdev.h>
26 #include <i2c.h>
27 #include <mmc.h>
28 #include <fsl_esdhc_imx.h>
29 #include <asm/gpio.h>
30 #include <power/pmic.h>
31 #include <dialog_pmic.h>
32 #include <fsl_pmic.h>
33 #include <linux/fb.h>
34 #include <ipu_pixfmt.h>
35 #include <version_string.h>
36 #include <watchdog.h>
37 #include "ppd_gpio.h"
38 #include <stdlib.h>
39 #include "../../ge/common/ge_rtc.h"
40 #include "../../ge/common/vpd_reader.h"
41
42 DECLARE_GLOBAL_DATA_PTR;
43
44 static u32 mx53_dram_size[2];
45
get_effective_memsize(void)46 phys_size_t get_effective_memsize(void)
47 {
48 /*
49 * WARNING: We must override get_effective_memsize() function here
50 * to report only the size of the first DRAM bank. This is to make
51 * U-Boot relocator place U-Boot into valid memory, that is, at the
52 * end of the first DRAM bank. If we did not override this function
53 * like so, U-Boot would be placed at the address of the first DRAM
54 * bank + total DRAM size - sizeof(uboot), which in the setup where
55 * each DRAM bank contains 512MiB of DRAM would result in placing
56 * U-Boot into invalid memory area close to the end of the first
57 * DRAM bank.
58 */
59 return mx53_dram_size[0];
60 }
61
dram_init(void)62 int dram_init(void)
63 {
64 mx53_dram_size[0] = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30);
65 mx53_dram_size[1] = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30);
66
67 gd->ram_size = mx53_dram_size[0] + mx53_dram_size[1];
68
69 return 0;
70 }
71
dram_init_banksize(void)72 int dram_init_banksize(void)
73 {
74 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
75 gd->bd->bi_dram[0].size = mx53_dram_size[0];
76
77 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
78 gd->bd->bi_dram[1].size = mx53_dram_size[1];
79
80 return 0;
81 }
82
83 #ifdef CONFIG_REVISION_TAG
get_board_rev(void)84 u32 get_board_rev(void)
85 {
86 return get_cpu_rev() & ~(0xF << 8);
87 }
88 #endif
89
90 #ifdef CONFIG_USB_EHCI_MX5
board_ehci_hcd_init(int port)91 int board_ehci_hcd_init(int port)
92 {
93 /* request VBUS power enable pin, GPIO7_8 */
94 imx_iomux_v3_setup_pad(MX53_PAD_PATA_DA_2__GPIO7_8);
95 gpio_direction_output(IMX_GPIO_NR(7, 8), 1);
96 return 0;
97 }
98 #endif
99
clock_1GHz(void)100 static int clock_1GHz(void)
101 {
102 int ret;
103 u32 ref_clk = MXC_HCLK;
104 /*
105 * After increasing voltage to 1.25V, we can switch
106 * CPU clock to 1GHz and DDR to 400MHz safely
107 */
108 ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
109 if (ret) {
110 printf("CPU: Switch CPU clock to 1GHZ failed\n");
111 return -1;
112 }
113
114 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
115 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
116 if (ret) {
117 printf("CPU: Switch DDR clock to 400MHz failed\n");
118 return -1;
119 }
120
121 return 0;
122 }
123
ppd_gpio_init(void)124 void ppd_gpio_init(void)
125 {
126 int i;
127
128 imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads));
129 for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) {
130 gpio_request(ppd_gpios[i].gpio, "request");
131 gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value);
132 }
133 }
134
board_early_init_f(void)135 int board_early_init_f(void)
136 {
137 ppd_gpio_init();
138
139 return 0;
140 }
141
142 /*
143 * Do not overwrite the console
144 * Use always serial for U-Boot console
145 */
overwrite_console(void)146 int overwrite_console(void)
147 {
148 return 1;
149 }
150
151 #define VPD_TYPE_INVALID 0x00
152 #define VPD_BLOCK_NETWORK 0x20
153 #define VPD_BLOCK_HWID 0x44
154 #define VPD_PRODUCT_PPD 4
155 #define VPD_HAS_MAC1 0x1
156 #define VPD_MAC_ADDRESS_LENGTH 6
157
158 struct vpd_cache {
159 u8 product_id;
160 u8 has;
161 unsigned char mac1[VPD_MAC_ADDRESS_LENGTH];
162 };
163
164 /*
165 * Extracts MAC and product information from the VPD.
166 */
vpd_callback(struct vpd_cache * userdata,u8 id,u8 version,u8 type,size_t size,u8 const * data)167 static int vpd_callback(struct vpd_cache *userdata, u8 id, u8 version,
168 u8 type, size_t size, u8 const *data)
169 {
170 struct vpd_cache *vpd = userdata;
171
172 if (id == VPD_BLOCK_HWID && version == 1 && type != VPD_TYPE_INVALID &&
173 size >= 1) {
174 vpd->product_id = data[0];
175
176 } else if (id == VPD_BLOCK_NETWORK && version == 1 &&
177 type != VPD_TYPE_INVALID) {
178 if (size >= 6) {
179 vpd->has |= VPD_HAS_MAC1;
180 memcpy(vpd->mac1, data, VPD_MAC_ADDRESS_LENGTH);
181 }
182 }
183
184 return 0;
185 }
186
process_vpd(struct vpd_cache * vpd)187 static void process_vpd(struct vpd_cache *vpd)
188 {
189 int fec_index = -1;
190
191 if (vpd->product_id == VPD_PRODUCT_PPD)
192 fec_index = 0;
193
194 if (fec_index >= 0 && (vpd->has & VPD_HAS_MAC1))
195 eth_env_set_enetaddr("ethaddr", vpd->mac1);
196 }
197
board_init(void)198 int board_init(void)
199 {
200 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
201
202 mxc_set_sata_internal_clock();
203
204 return 0;
205 }
206
misc_init_r(void)207 int misc_init_r(void)
208 {
209 const char *cause;
210
211 /* We care about WDOG only, treating everything else as
212 * a power-on-reset.
213 */
214 if (get_imx_reset_cause() & 0x0010)
215 cause = "WDOG";
216 else
217 cause = "POR";
218
219 env_set("bootcause", cause);
220
221 return 0;
222 }
223
board_late_init(void)224 int board_late_init(void)
225 {
226 int res;
227 struct vpd_cache vpd;
228
229 memset(&vpd, 0, sizeof(vpd));
230 res = read_i2c_vpd(&vpd, vpd_callback);
231 if (!res)
232 process_vpd(&vpd);
233 else
234 printf("Can't read VPD");
235
236 res = clock_1GHz();
237 if (res != 0)
238 return res;
239
240 print_cpuinfo();
241
242 check_time();
243
244 return 0;
245 }
246
checkboard(void)247 int checkboard(void)
248 {
249 puts("Board: GE PPD\n");
250
251 return 0;
252 }
253
254 #ifdef CONFIG_OF_BOARD_SETUP
ft_board_setup(void * blob,struct bd_info * bd)255 int ft_board_setup(void *blob, struct bd_info *bd)
256 {
257 char *rtc_status = env_get("rtc_status");
258
259 fdt_setprop(blob, 0, "ge,boot-ver", version_string,
260 strlen(version_string) + 1);
261
262 fdt_setprop(blob, 0, "ge,rtc-status", rtc_status,
263 strlen(rtc_status) + 1);
264 return 0;
265 }
266 #endif
267