1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2010,2011 4 * NVIDIA Corporation <www.nvidia.com> 5 */ 6 7 #include <asm/io.h> 8 #include <asm/arch/clock.h> 9 #include <asm/arch/funcmux.h> 10 #include <asm/arch/pinmux.h> 11 #include <asm/arch/tegra.h> 12 #include <asm/gpio.h> 13 14 #ifdef CONFIG_MMC_SDHCI_TEGRA 15 /* 16 * Routine: pin_mux_mmc 17 * Description: setup the pin muxes/tristate values for the SDMMC(s) 18 */ pin_mux_mmc(void)19void pin_mux_mmc(void) 20 { 21 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); 22 funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); 23 24 /* For power GPIO PI6 */ 25 pinmux_tristate_disable(PMUX_PINGRP_ATA); 26 /* For CD GPIO PH2 */ 27 pinmux_tristate_disable(PMUX_PINGRP_ATD); 28 29 /* For power GPIO PT3 */ 30 pinmux_tristate_disable(PMUX_PINGRP_DTB); 31 /* For CD GPIO PI5 */ 32 pinmux_tristate_disable(PMUX_PINGRP_ATC); 33 } 34 #endif 35 pin_mux_usb(void)36void pin_mux_usb(void) 37 { 38 funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); 39 pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); 40 pinmux_tristate_disable(PMUX_PINGRP_CDEV2); 41 /* USB2 PHY reset GPIO */ 42 pinmux_tristate_disable(PMUX_PINGRP_UAC); 43 } 44 pin_mux_display(void)45void pin_mux_display(void) 46 { 47 pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); 48 pinmux_tristate_disable(PMUX_PINGRP_SDC); 49 } 50