1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
5 */
6
7 #include <asm/io.h>
8 #include <asm/mach-types.h>
9 #include <asm/arch/tegra.h>
10 #include <asm/arch-tegra/board.h>
11 #include <asm/arch/clock.h>
12 #include <asm/arch/funcmux.h>
13 #include <asm/arch/gpio.h>
14 #include <asm/arch/pinmux.h>
15 #include <asm/gpio.h>
16
17 /* TODO: Remove this code when the SPI switch is working */
18 #ifndef CONFIG_TARGET_VENTANA
gpio_early_init_uart(void)19 void gpio_early_init_uart(void)
20 {
21 /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
22 gpio_request(TEGRA_GPIO(I, 3), "uart_en");
23 gpio_direction_output(TEGRA_GPIO(I, 3), 0);
24 }
25 #endif
26
27 #ifdef CONFIG_MMC_SDHCI_TEGRA
28 /*
29 * Routine: pin_mux_mmc
30 * Description: setup the pin muxes/tristate values for the SDMMC(s)
31 */
pin_mux_mmc(void)32 void pin_mux_mmc(void)
33 {
34 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
35 funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
36
37 /* For power GPIO PI6 */
38 pinmux_tristate_disable(PMUX_PINGRP_ATA);
39 /* For CD GPIO PI5 */
40 pinmux_tristate_disable(PMUX_PINGRP_ATC);
41 }
42 #endif
43
pin_mux_usb(void)44 void pin_mux_usb(void)
45 {
46 /* For USB0's GPIO PD0. For now, since we have no pinmux in fdt */
47 pinmux_tristate_disable(PMUX_PINGRP_SLXK);
48 /* For USB1's ULPI signals */
49 funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
50 pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
51 pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
52 /* USB1 PHY reset GPIO */
53 pinmux_tristate_disable(PMUX_PINGRP_UAC);
54 }
55