1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2019-2020 PHYTEC Messtechnik GmbH
4  * Author: Teresa Remmet <t.remmet@phytec.de>
5  */
6 
7 #include <asm/arch/clock.h>
8 #include <asm/arch/ddr.h>
9 #include <asm/arch/imx8mm_pins.h>
10 #include <asm/arch/sys_proto.h>
11 #include <asm/global_data.h>
12 #include <asm/mach-imx/boot_mode.h>
13 #include <asm/mach-imx/iomux-v3.h>
14 #include <asm/sections.h>
15 #include <hang.h>
16 #include <init.h>
17 #include <log.h>
18 #include <spl.h>
19 
20 #include "../common/imx8m_som_detection.h"
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 #define EEPROM_ADDR		0x51
25 #define EEPROM_ADDR_FALLBACK	0x59
26 
spl_board_boot_device(enum boot_device boot_dev_spl)27 int spl_board_boot_device(enum boot_device boot_dev_spl)
28 {
29 	switch (boot_dev_spl) {
30 	case SD2_BOOT:
31 	case MMC2_BOOT:
32 		return BOOT_DEVICE_MMC1;
33 	case SD3_BOOT:
34 	case MMC3_BOOT:
35 		return BOOT_DEVICE_MMC2;
36 	case QSPI_BOOT:
37 		return BOOT_DEVICE_NOR;
38 	case USB_BOOT:
39 		return BOOT_DEVICE_BOARD;
40 	default:
41 		return BOOT_DEVICE_NONE;
42 	}
43 }
44 
spl_dram_init(void)45 static void spl_dram_init(void)
46 {
47 	int ret;
48 
49 	ret = phytec_eeprom_data_setup_fallback(NULL, 0, EEPROM_ADDR,
50 			EEPROM_ADDR_FALLBACK);
51 	if (ret)
52 		goto out;
53 
54 	ret = phytec_imx8m_detect(NULL);
55 	if (!ret)
56 		phytec_print_som_info(NULL);
57 
58 out:
59 	ddr_init(&dram_timing);
60 }
61 
board_fit_config_name_match(const char * name)62 int board_fit_config_name_match(const char *name)
63 {
64 	return 0;
65 }
66 
board_init_f(ulong dummy)67 void board_init_f(ulong dummy)
68 {
69 	int ret;
70 
71 	arch_cpu_init();
72 
73 	init_uart_clk(2);
74 
75 	/* Clear the BSS. */
76 	memset(__bss_start, 0, __bss_end - __bss_start);
77 
78 	ret = spl_early_init();
79 	if (ret) {
80 		debug("spl_early_init() failed: %d\n", ret);
81 		hang();
82 	}
83 
84 	preloader_console_init();
85 
86 	enable_tzc380();
87 
88 	/* DDR initialization */
89 	spl_dram_init();
90 
91 	board_init_r(NULL, 0);
92 }
93