1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
2 /*
3  * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
4  */
5 
6 #include <config.h>
7 #include <debug_uart.h>
8 #include <asm/io.h>
9 #include <asm/arch/stm32.h>
10 #include <linux/bitops.h>
11 
12 #if IS_ENABLED(CONFIG_STM32MP13X)
13 #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0700)
14 #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0768)
15 #elif IS_ENABLED(CONFIG_STM32MP15X)
16 #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
17 #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
18 #endif
19 
20 #define GPIOA_BASE 0x50002000
21 #define GPIOG_BASE 0x50008000
22 
board_debug_uart_init(void)23 void board_debug_uart_init(void)
24 {
25 	if (CONFIG_DEBUG_UART_BASE != STM32_UART4_BASE)
26 		return;
27 
28 	/* UART4 clock enable */
29 	setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
30 
31 	if (IS_ENABLED(CONFIG_STM32MP13X)) {
32 		/* GPIOA clock enable */
33 		writel(BIT(0), RCC_MP_AHB4ENSETR);
34 		/* GPIO configuration for DH boards: Uart4 TX = A9 */
35 		writel(0xfffbffff, GPIOA_BASE + 0x00);
36 		writel(0x00000080, GPIOA_BASE + 0x24);
37 	} else if (IS_ENABLED(CONFIG_STM32MP15X)) {
38 		/* GPIOG clock enable */
39 		writel(BIT(6), RCC_MP_AHB4ENSETR);
40 		/* GPIO configuration for ST boards: Uart4 TX = G11 */
41 		writel(0xffbfffff, GPIOG_BASE + 0x00);
42 		writel(0x00006000, GPIOG_BASE + 0x24);
43 	}
44 }
45