1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
4  */
5 
6 #include <cpu_func.h>
7 #include <dwmmc.h>
8 #include <init.h>
9 #include <malloc.h>
10 #include <asm/arcregs.h>
11 #include <asm/global_data.h>
12 #include "axs10x.h"
13 #include <asm/cache.h>
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
17 #define AXS_MB_CREG	0xE0011000
18 
board_early_init_f(void)19 int board_early_init_f(void)
20 {
21 	if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
22 		gd->board_type = AXS_MB_V3;
23 	else
24 		gd->board_type = AXS_MB_V2;
25 
26 	return 0;
27 }
28 
29 #ifdef CONFIG_ISA_ARCV2
30 
board_jump_and_run(ulong entry,int zero,int arch,uint params)31 void board_jump_and_run(ulong entry, int zero, int arch, uint params)
32 {
33 	void (*kernel_entry)(int zero, int arch, uint params);
34 
35 	kernel_entry = (void (*)(int, int, uint))entry;
36 
37 	smp_set_core_boot_addr(entry, -1);
38 	smp_kick_all_cpus();
39 	kernel_entry(zero, arch, params);
40 }
41 
42 #define RESET_VECTOR_ADDR	0x0
43 
smp_set_core_boot_addr(unsigned long addr,int corenr)44 void smp_set_core_boot_addr(unsigned long addr, int corenr)
45 {
46 	/* All cores have reset vector pointing to 0 */
47 	writel(addr, (void __iomem *)RESET_VECTOR_ADDR);
48 
49 	/* Make sure other cores see written value in memory */
50 	flush_dcache_all();
51 }
52 
smp_kick_all_cpus(void)53 void smp_kick_all_cpus(void)
54 {
55 /* CPU start CREG */
56 #define AXC003_CREG_CPU_START	0xF0001400
57 /* Bits positions in CPU start CREG */
58 #define BITS_START	0
59 #define BITS_START_MODE	4
60 #define BITS_CORE_SEL	9
61 
62 /*
63  * In axs103 v1.1 START bits semantics has changed quite a bit.
64  * We used to have a generic START bit for all cores selected by CORE_SEL mask.
65  * But now we don't touch CORE_SEL at all because we have a dedicated START bit
66  * for each core:
67  *     bit 0: Core 0 (master)
68  *     bit 1: Core 1 (slave)
69  */
70 #define BITS_START_CORE1	1
71 
72 #define ARCVER_HS38_3_0	0x53
73 
74 	int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
75 	int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
76 
77 	if (core_family < ARCVER_HS38_3_0) {
78 		cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
79 		cmd &= ~(1 << BITS_START_MODE);
80 	} else {
81 		cmd |= (1 << BITS_START_CORE1);
82 	}
83 	writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
84 }
85 #endif
86 
checkboard(void)87 int checkboard(void)
88 {
89 	printf("Board: ARC Software Development Platform AXS%s\n",
90 	     is_isa_arcv2() ? "103" : "101");
91 
92 	return 0;
93 };
94