1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2016-2018 Toradex, Inc.
4 */
5
6 #include <dm.h>
7 #include <env.h>
8 #include <init.h>
9 #include <log.h>
10 #include <asm/arch-tegra/ap.h>
11 #include <asm/gpio.h>
12 #include <asm/io.h>
13 #include <asm/arch/gpio.h>
14 #include <asm/arch/pinmux.h>
15 #include <env_internal.h>
16 #include <fdt_support.h>
17 #include <pci_tegra.h>
18 #include <linux/delay.h>
19 #include <linux/printk.h>
20 #include <power/as3722.h>
21 #include <power/pmic.h>
22
23 #include "../common/tdx-common.h"
24 #include "pinmux-config-apalis-tk1.h"
25
26 #define LAN_DEV_OFF_N TEGRA_GPIO(O, 6)
27 #define LAN_RESET_N TEGRA_GPIO(S, 2)
28 #define FAN_EN TEGRA_GPIO(DD, 2)
29 #define LAN_WAKE_N TEGRA_GPIO(O, 5)
30 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
31 #define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
32 #define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
33 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
34 #define VCC_USBH TEGRA_GPIO(T, 6)
35 #define VCC_USBH_V1_0 TEGRA_GPIO(N, 5)
36 #define VCC_USBO1 TEGRA_GPIO(T, 5)
37 #define VCC_USBO1_V1_0 TEGRA_GPIO(N, 4)
38
misc_init_r(void)39 int misc_init_r(void)
40 {
41 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
42 NVBOOTTYPE_RECOVERY) {
43 printf("USB recovery mode, attempting to boot Toradex Easy "
44 "Installer\n");
45 env_set("bootdelay", "-2");
46 env_set("defargs", "pcie_aspm=off user_debug=30");
47 env_set("fdt_high", "");
48 env_set("initrd_high", "");
49
50 env_set("setup", "env set setupargs igb_mac=${ethaddr} "
51 "consoleblank=0 no_console_suspend=1 "
52 "console=${console},${baudrate}n8 ${memargs}");
53 env_set("teziargs", "rootfstype=squashfs root=/dev/ram quiet "
54 "autoinstall");
55 env_set("vidargs", "video=HDMI-A-1:640x480-16@60D");
56 env_set("bootcmd", "run setup; env set bootargs ${defargs} "
57 "${setupargs} ${vidargs} ${teziargs}; bootm 0x80208000"
58 "#config@${soc}-${fdt_module}-${fdt_board}.dtb");
59 }
60
61 /* PCB Version Indication: V1.2 and later have GPIO_PV0 wired to GND */
62 gpio_request(TEGRA_GPIO(V, 0), "PCB Version Indication");
63 gpio_direction_input(TEGRA_GPIO(V, 0));
64 if (gpio_get_value(TEGRA_GPIO(V, 0))) {
65 /*
66 * if using the default device tree for new V1.2 and later HW,
67 * use version for older V1.0 and V1.1 HW
68 */
69 char *fdt_env = env_get("fdt_module");
70
71 if (fdt_env && !strcmp(FDT_MODULE, fdt_env)) {
72 env_set("fdt_module", FDT_MODULE_V1_0);
73 printf("patching fdt_module to " FDT_MODULE_V1_0
74 " for older V1.0 and V1.1 HW\n");
75 }
76
77 /* activate USB power enable GPIOs */
78 gpio_request(VCC_USBH_V1_0, "VCC_USBH");
79 gpio_direction_output(VCC_USBH_V1_0, 1);
80 gpio_request(VCC_USBO1_V1_0, "VCC_USBO1");
81 gpio_direction_output(VCC_USBO1_V1_0, 1);
82 } else {
83 /* activate USB power enable GPIOs */
84 gpio_request(VCC_USBH, "VCC_USBH");
85 gpio_direction_output(VCC_USBH, 1);
86 gpio_request(VCC_USBO1, "VCC_USBO1");
87 gpio_direction_output(VCC_USBO1, 1);
88 }
89
90 return 0;
91 }
92
93 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,struct bd_info * bd)94 int ft_board_setup(void *blob, struct bd_info *bd)
95 {
96 u8 enetaddr[6];
97
98 /* MAC addr */
99 if (eth_env_get_enetaddr("ethaddr", enetaddr)) {
100 int err = fdt_find_and_setprop(blob,
101 "/pcie@1003000/pci@2,0/ethernet@0,0",
102 "local-mac-address", enetaddr, 6, 0);
103
104 /* Older device trees might have used a different node name */
105 if (err < 0)
106 err = fdt_find_and_setprop(blob,
107 "/pcie@1003000/pci@2,0/pcie@0",
108 "local-mac-address", enetaddr, 6, 0);
109
110 if (err >= 0)
111 puts(" MAC address updated...\n");
112 }
113
114 return ft_common_board_setup(blob, bd);
115 }
116 #endif
117
118 /*
119 * Routine: pinmux_init
120 * Description: Do individual peripheral pinmux configs
121 */
pinmux_init(void)122 void pinmux_init(void)
123 {
124 pinmux_clear_tristate_input_clamping();
125
126 gpio_config_table(apalis_tk1_gpio_inits,
127 ARRAY_SIZE(apalis_tk1_gpio_inits));
128
129 pinmux_config_pingrp_table(apalis_tk1_pingrps,
130 ARRAY_SIZE(apalis_tk1_pingrps));
131
132 pinmux_config_drvgrp_table(apalis_tk1_drvgrps,
133 ARRAY_SIZE(apalis_tk1_drvgrps));
134 }
135
136 #ifdef CONFIG_PCI_TEGRA
137 /* TODO: Convert to driver model */
as3722_sd_enable(struct udevice * pmic,unsigned int sd)138 static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
139 {
140 int err;
141
142 if (sd > 6)
143 return -EINVAL;
144
145 err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
146 if (err) {
147 pr_err("failed to update SD control register: %d", err);
148 return err;
149 }
150
151 return 0;
152 }
153
154 /* TODO: Convert to driver model */
as3722_ldo_enable(struct udevice * pmic,unsigned int ldo)155 static int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
156 {
157 int err;
158 u8 ctrl_reg = AS3722_LDO_CONTROL0;
159
160 if (ldo > 11)
161 return -EINVAL;
162
163 if (ldo > 7) {
164 ctrl_reg = AS3722_LDO_CONTROL1;
165 ldo -= 8;
166 }
167
168 err = pmic_clrsetbits(pmic, ctrl_reg, 0, 1 << ldo);
169 if (err) {
170 pr_err("failed to update LDO control register: %d", err);
171 return err;
172 }
173
174 return 0;
175 }
176
tegra_pcie_board_init(void)177 int tegra_pcie_board_init(void)
178 {
179 struct udevice *dev;
180 int ret;
181
182 ret = uclass_get_device_by_driver(UCLASS_PMIC,
183 DM_DRIVER_GET(pmic_as3722), &dev);
184 if (ret) {
185 pr_err("failed to find AS3722 PMIC: %d\n", ret);
186 return ret;
187 }
188
189 ret = as3722_sd_enable(dev, 4);
190 if (ret < 0) {
191 pr_err("failed to enable SD4: %d\n", ret);
192 return ret;
193 }
194
195 ret = as3722_sd_set_voltage(dev, 4, 0x24);
196 if (ret < 0) {
197 pr_err("failed to set SD4 voltage: %d\n", ret);
198 return ret;
199 }
200
201 gpio_request(LAN_DEV_OFF_N, "LAN_DEV_OFF_N");
202 gpio_request(LAN_RESET_N, "LAN_RESET_N");
203 gpio_request(LAN_WAKE_N, "LAN_WAKE_N");
204
205 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
206 gpio_request(PEX_PERST_N, "PEX_PERST_N");
207 gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
208 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
209
210 return 0;
211 }
212
tegra_pcie_board_port_reset(struct tegra_pcie_port * port)213 void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
214 {
215 int index = tegra_pcie_port_index_of_port(port);
216
217 if (index == 1) { /* I210 Gigabit Ethernet Controller (On-module) */
218 struct udevice *dev;
219 int ret;
220
221 ret = uclass_get_device_by_driver(UCLASS_PMIC,
222 DM_DRIVER_GET(pmic_as3722),
223 &dev);
224 if (ret) {
225 debug("%s: Failed to find PMIC\n", __func__);
226 return;
227 }
228
229 /* Reset I210 Gigabit Ethernet Controller */
230 gpio_direction_output(LAN_RESET_N, 0);
231
232 /*
233 * Make sure we don't get any back feeding from DEV_OFF_N resp.
234 * LAN_WAKE_N
235 */
236 gpio_direction_output(LAN_DEV_OFF_N, 0);
237 gpio_direction_output(LAN_WAKE_N, 0);
238
239 /* Make sure LDO9 and LDO10 are initially enabled @ 0V */
240 ret = as3722_ldo_enable(dev, 9);
241 if (ret < 0) {
242 pr_err("failed to enable LDO9: %d\n", ret);
243 return;
244 }
245 ret = as3722_ldo_enable(dev, 10);
246 if (ret < 0) {
247 pr_err("failed to enable LDO10: %d\n", ret);
248 return;
249 }
250 ret = as3722_ldo_set_voltage(dev, 9, 0x80);
251 if (ret < 0) {
252 pr_err("failed to set LDO9 voltage: %d\n", ret);
253 return;
254 }
255 ret = as3722_ldo_set_voltage(dev, 10, 0x80);
256 if (ret < 0) {
257 pr_err("failed to set LDO10 voltage: %d\n", ret);
258 return;
259 }
260
261 /* Make sure controller gets enabled by disabling DEV_OFF_N */
262 gpio_set_value(LAN_DEV_OFF_N, 1);
263
264 /*
265 * Enable LDO9 and LDO10 for +V3.3_ETH on patched prototype
266 * V1.0A and sample V1.0B and newer modules
267 */
268 ret = as3722_ldo_set_voltage(dev, 9, 0xff);
269 if (ret < 0) {
270 pr_err("failed to set LDO9 voltage: %d\n", ret);
271 return;
272 }
273 ret = as3722_ldo_set_voltage(dev, 10, 0xff);
274 if (ret < 0) {
275 pr_err("failed to set LDO10 voltage: %d\n", ret);
276 return;
277 }
278
279 /*
280 * Must be asserted for 100 ms after power and clocks are stable
281 */
282 mdelay(100);
283
284 gpio_set_value(LAN_RESET_N, 1);
285 } else if (index == 0) { /* Apalis PCIe */
286 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
287 /*
288 * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis
289 * Evaluation Board
290 */
291 gpio_direction_output(PEX_PERST_N, 0);
292 gpio_direction_output(RESET_MOCI_CTRL, 0);
293
294 /*
295 * Must be asserted for 100 ms after power and clocks are stable
296 */
297 mdelay(100);
298
299 gpio_set_value(PEX_PERST_N, 1);
300 /*
301 * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed
302 * Until 900 us After PEX_PERST# De-assertion
303 */
304 mdelay(1);
305 gpio_set_value(RESET_MOCI_CTRL, 1);
306 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
307 }
308 }
309 #endif /* CONFIG_PCI_TEGRA */
310
311 /*
312 * Enable/start PWM CPU fan
313 */
start_cpu_fan(void)314 void start_cpu_fan(void)
315 {
316 gpio_request(FAN_EN, "FAN_EN");
317 gpio_direction_output(FAN_EN, 1);
318 }
319
320 /*
321 * Backlight off before OS handover
322 */
board_preboot_os(void)323 void board_preboot_os(void)
324 {
325 gpio_request(TEGRA_GPIO(BB, 5), "BL_ON");
326 gpio_direction_output(TEGRA_GPIO(BB, 5), 0);
327 }
328