1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * WORK Microwave work_92105 board support
4 *
5 * (C) Copyright 2014 DENX Software Engineering GmbH
6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7 */
8
9 #include <config.h>
10 #include <init.h>
11 #include <asm/global_data.h>
12 #include <asm/io.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/clk.h>
16 #include <asm/arch/emc.h>
17 #include <asm/arch/wdt.h>
18 #include <asm/gpio.h>
19 #include <spl.h>
20 #include <linux/delay.h>
21 #include "work_92105_display.h"
22
23 DECLARE_GLOBAL_DATA_PTR;
24
25 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
26 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
27
reset_periph(void)28 void reset_periph(void)
29 {
30 setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
31 writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);
32 udelay(150);
33 writel(0, &wdt->mctrl);
34 clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
35 }
36
board_early_init_f(void)37 int board_early_init_f(void)
38 {
39 /* initialize serial port for console */
40 lpc32xx_uart_init(CONFIG_CONS_INDEX);
41 /* enable I2C, SSP, MAC, NAND */
42 lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */
43 lpc32xx_ssp_init();
44 lpc32xx_mac_init();
45 lpc32xx_mlc_nand_init();
46 /* Display must wait until after relocation and devices init */
47 return 0;
48 }
49
50 #define GPO_19 115
51
board_early_init_r(void)52 int board_early_init_r(void)
53 {
54 /* Set NAND !WP to 1 through GPO_19 */
55 gpio_request(GPO_19, "NAND_nWP");
56 gpio_direction_output(GPO_19, 1);
57
58 #ifdef CONFIG_DEPRECATED
59 /* initialize display */
60 work_92105_display_init();
61 #endif
62
63 return 0;
64 }
65
board_init(void)66 int board_init(void)
67 {
68 reset_periph();
69 /* adress of boot parameters */
70 gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
71
72 return 0;
73 }
74
dram_init(void)75 int dram_init(void)
76 {
77 gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
78 CFG_SYS_SDRAM_SIZE);
79
80 return 0;
81 }
82