1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2009
4 * Sergey Kubushyn, himself, ksi@koi8.net
5 *
6 * Changes for unified multibus/multiadapter I2C support.
7 *
8 * (C) Copyright 2001
9 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
10 */
11
12 /*
13 * I2C Functions similar to the standard memory functions.
14 *
15 * There are several parameters in many of the commands that bear further
16 * explanations:
17 *
18 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
19 * Each I2C chip on the bus has a unique address. On the I2C data bus,
20 * the address is the upper seven bits and the LSB is the "read/write"
21 * bit. Note that the {i2c_chip} address specified on the command
22 * line is not shifted up: e.g. a typical EEPROM memory chip may have
23 * an I2C address of 0x50, but the data put on the bus will be 0xA0
24 * for write and 0xA1 for read. This "non shifted" address notation
25 * matches at least half of the data sheets :-/.
26 *
27 * {addr} is the address (or offset) within the chip. Small memory
28 * chips have 8 bit addresses. Large memory chips have 16 bit
29 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
30 * Many non-memory chips have multiple registers and {addr} is used
31 * as the register index. Some non-memory chips have only one register
32 * and therefore don't need any {addr} parameter.
33 *
34 * The default {addr} parameter is one byte (.1) which works well for
35 * memories and registers with 8 bits of address space.
36 *
37 * You can specify the length of the {addr} field with the optional .0,
38 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
39 * manipulating a single register device which doesn't use an address
40 * field, use "0.0" for the address and the ".0" length field will
41 * suppress the address in the I2C data stream. This also works for
42 * successive reads using the I2C auto-incrementing memory pointer.
43 *
44 * If you are manipulating a large memory with 2-byte addresses, use
45 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
46 *
47 * Then there are the unfortunate memory chips that spill the most
48 * significant 1, 2, or 3 bits of address into the chip address byte.
49 * This effectively makes one chip (logically) look like 2, 4, or
50 * 8 chips. This is handled (awkwardly) by #defining
51 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
52 * {addr} field (since .1 is the default, it doesn't actually have to
53 * be specified). Examples: given a memory chip at I2C chip address
54 * 0x50, the following would happen...
55 * i2c md 50 0 10 display 16 bytes starting at 0x000
56 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
57 * i2c md 50 100 10 display 16 bytes starting at 0x100
58 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
59 * i2c md 50 210 10 display 16 bytes starting at 0x210
60 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
61 * This is awfully ugly. It would be nice if someone would think up
62 * a better way of handling this.
63 *
64 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
65 */
66
67 #include <bootretry.h>
68 #include <cli.h>
69 #include <command.h>
70 #include <console.h>
71 #include <dm.h>
72 #include <edid.h>
73 #include <errno.h>
74 #include <i2c.h>
75 #include <log.h>
76 #include <malloc.h>
77 #include <asm/byteorder.h>
78 #include <linux/compiler.h>
79 #include <linux/delay.h>
80 #include <u-boot/crc.h>
81
82 /* Display values from last command.
83 * Memory modify remembered values are different from display memory.
84 */
85 static uint i2c_dp_last_chip;
86 static uint i2c_dp_last_addr;
87 static uint i2c_dp_last_alen;
88 static uint i2c_dp_last_length = 0x10;
89
90 static uint i2c_mm_last_chip;
91 static uint i2c_mm_last_addr;
92 static uint i2c_mm_last_alen;
93
94 /* If only one I2C bus is present, the list of devices to ignore when
95 * the probe command is issued is represented by a 1D array of addresses.
96 * When multiple buses are present, the list is an array of bus-address
97 * pairs. The following macros take care of this */
98
99 #if defined(CFG_SYS_I2C_NOPROBES)
100 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
101 static struct
102 {
103 uchar bus;
104 uchar addr;
105 } i2c_no_probes[] = CFG_SYS_I2C_NOPROBES;
106 #define GET_BUS_NUM i2c_get_bus_num()
107 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
108 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
109 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
110 #else /* single bus */
111 static uchar i2c_no_probes[] = CFG_SYS_I2C_NOPROBES;
112 #define GET_BUS_NUM 0
113 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
114 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
115 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
116 #endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
117 #endif
118
119 #define DISP_LINE_LEN 16
120
121 /*
122 * Default for driver model is to use the chip's existing address length.
123 * For legacy code, this is not stored, so we need to use a suitable
124 * default.
125 */
126 #if CONFIG_IS_ENABLED(DM_I2C)
127 #define DEFAULT_ADDR_LEN (-1)
128 #else
129 #define DEFAULT_ADDR_LEN 1
130 #endif
131
132 #if CONFIG_IS_ENABLED(DM_I2C)
133 static struct udevice *i2c_cur_bus;
134
cmd_i2c_set_bus_num(unsigned int busnum)135 static int cmd_i2c_set_bus_num(unsigned int busnum)
136 {
137 struct udevice *bus;
138 int ret;
139
140 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
141 if (ret) {
142 debug("%s: No bus %d\n", __func__, busnum);
143 return ret;
144 }
145 i2c_cur_bus = bus;
146
147 return 0;
148 }
149
i2c_get_cur_bus(struct udevice ** busp)150 static int i2c_get_cur_bus(struct udevice **busp)
151 {
152 #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM
153 if (!i2c_cur_bus) {
154 if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) {
155 printf("Default I2C bus %d not found\n",
156 CONFIG_I2C_DEFAULT_BUS_NUMBER);
157 return -ENODEV;
158 }
159 }
160 #endif
161
162 if (!i2c_cur_bus) {
163 puts("No I2C bus selected\n");
164 return -ENODEV;
165 }
166 *busp = i2c_cur_bus;
167
168 return 0;
169 }
170
i2c_get_cur_bus_chip(uint chip_addr,struct udevice ** devp)171 static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp)
172 {
173 struct udevice *bus;
174 int ret;
175
176 ret = i2c_get_cur_bus(&bus);
177 if (ret)
178 return ret;
179
180 return i2c_get_chip(bus, chip_addr, 1, devp);
181 }
182
183 #endif
184
185 /**
186 * i2c_init_board() - Board-specific I2C bus init
187 *
188 * This function is the default no-op implementation of I2C bus
189 * initialization. This function can be overridden by board-specific
190 * implementation if needed.
191 */
192 __weak
i2c_init_board(void)193 void i2c_init_board(void)
194 {
195 }
196
197 /**
198 * get_alen() - Small parser helper function to get address length
199 *
200 * Returns the address length.
201 */
get_alen(char * arg,int default_len)202 static uint get_alen(char *arg, int default_len)
203 {
204 int j;
205 int alen;
206
207 alen = default_len;
208 for (j = 0; j < 8; j++) {
209 if (arg[j] == '.') {
210 alen = arg[j+1] - '0';
211 break;
212 } else if (arg[j] == '\0')
213 break;
214 }
215 return alen;
216 }
217
218 enum i2c_err_op {
219 I2C_ERR_READ,
220 I2C_ERR_WRITE,
221 };
222
i2c_report_err(int ret,enum i2c_err_op op)223 static int i2c_report_err(int ret, enum i2c_err_op op)
224 {
225 printf("Error %s the chip: %d\n",
226 op == I2C_ERR_READ ? "reading" : "writing", ret);
227
228 return CMD_RET_FAILURE;
229 }
230
231 /**
232 * do_i2c_read() - Handle the "i2c read" command-line command
233 * @cmdtp: Command data struct pointer
234 * @flag: Command flag
235 * @argc: Command-line argument count
236 * @argv: Array of command-line arguments
237 *
238 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
239 * on error.
240 *
241 * Syntax:
242 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
243 */
do_i2c_read(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])244 static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
245 char *const argv[])
246 {
247 uint chip;
248 uint devaddr, length;
249 int alen;
250 u_char *memaddr;
251 int ret;
252 #if CONFIG_IS_ENABLED(DM_I2C)
253 struct udevice *dev;
254 #endif
255
256 if (argc != 5)
257 return CMD_RET_USAGE;
258
259 /*
260 * I2C chip address
261 */
262 chip = hextoul(argv[1], NULL);
263
264 /*
265 * I2C data address within the chip. This can be 1 or
266 * 2 bytes long. Some day it might be 3 bytes long :-).
267 */
268 devaddr = hextoul(argv[2], NULL);
269 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
270 if (alen > 3)
271 return CMD_RET_USAGE;
272
273 /*
274 * Length is the number of objects, not number of bytes.
275 */
276 length = hextoul(argv[3], NULL);
277
278 /*
279 * memaddr is the address where to store things in memory
280 */
281 memaddr = (u_char *)hextoul(argv[4], NULL);
282
283 #if CONFIG_IS_ENABLED(DM_I2C)
284 ret = i2c_get_cur_bus_chip(chip, &dev);
285 if (!ret && alen != -1)
286 ret = i2c_set_chip_offset_len(dev, alen);
287 if (!ret)
288 ret = dm_i2c_read(dev, devaddr, memaddr, length);
289 #else
290 ret = i2c_read(chip, devaddr, alen, memaddr, length);
291 #endif
292 if (ret)
293 return i2c_report_err(ret, I2C_ERR_READ);
294
295 return 0;
296 }
297
do_i2c_write(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])298 static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
299 char *const argv[])
300 {
301 uint chip;
302 uint devaddr;
303 int length;
304 int alen;
305 u_char *memaddr;
306 int ret;
307 #if CONFIG_IS_ENABLED(DM_I2C)
308 struct udevice *dev;
309 struct dm_i2c_chip *i2c_chip;
310 #endif
311
312 if ((argc < 5) || (argc > 6))
313 return cmd_usage(cmdtp);
314
315 /*
316 * memaddr is the address where to store things in memory
317 */
318 memaddr = (u_char *)hextoul(argv[1], NULL);
319
320 /*
321 * I2C chip address
322 */
323 chip = hextoul(argv[2], NULL);
324
325 /*
326 * I2C data address within the chip. This can be 1 or
327 * 2 bytes long. Some day it might be 3 bytes long :-).
328 */
329 devaddr = hextoul(argv[3], NULL);
330 alen = get_alen(argv[3], DEFAULT_ADDR_LEN);
331 if (alen > 3)
332 return cmd_usage(cmdtp);
333
334 /*
335 * Length is the number of bytes.
336 */
337 length = hextoul(argv[4], NULL);
338
339 #if CONFIG_IS_ENABLED(DM_I2C)
340 ret = i2c_get_cur_bus_chip(chip, &dev);
341 if (!ret && alen != -1)
342 ret = i2c_set_chip_offset_len(dev, alen);
343 if (ret)
344 return i2c_report_err(ret, I2C_ERR_WRITE);
345 i2c_chip = dev_get_parent_plat(dev);
346 if (!i2c_chip)
347 return i2c_report_err(ret, I2C_ERR_WRITE);
348 #endif
349
350 if (argc == 6 && !strcmp(argv[5], "-s")) {
351 /*
352 * Write all bytes in a single I2C transaction. If the target
353 * device is an EEPROM, it is your responsibility to not cross
354 * a page boundary. No write delay upon completion, take this
355 * into account if linking commands.
356 */
357 #if CONFIG_IS_ENABLED(DM_I2C)
358 i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
359 ret = dm_i2c_write(dev, devaddr, memaddr, length);
360 #else
361 ret = i2c_write(chip, devaddr, alen, memaddr, length);
362 #endif
363 if (ret)
364 return i2c_report_err(ret, I2C_ERR_WRITE);
365 } else {
366 /*
367 * Repeated addressing - perform <length> separate
368 * write transactions of one byte each
369 */
370 while (length-- > 0) {
371 #if CONFIG_IS_ENABLED(DM_I2C)
372 i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
373 ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
374 #else
375 ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
376 #endif
377 if (ret)
378 return i2c_report_err(ret, I2C_ERR_WRITE);
379 /*
380 * No write delay with FRAM devices.
381 */
382 #if !defined(CONFIG_SYS_I2C_FRAM)
383 udelay(11000);
384 #endif
385 }
386 }
387 return 0;
388 }
389
390 #if CONFIG_IS_ENABLED(DM_I2C)
do_i2c_flags(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])391 static int do_i2c_flags(struct cmd_tbl *cmdtp, int flag, int argc,
392 char *const argv[])
393 {
394 struct udevice *dev;
395 uint flags;
396 int chip;
397 int ret;
398
399 if (argc < 2)
400 return CMD_RET_USAGE;
401
402 chip = hextoul(argv[1], NULL);
403 ret = i2c_get_cur_bus_chip(chip, &dev);
404 if (ret)
405 return i2c_report_err(ret, I2C_ERR_READ);
406
407 if (argc > 2) {
408 flags = hextoul(argv[2], NULL);
409 ret = i2c_set_chip_flags(dev, flags);
410 } else {
411 ret = i2c_get_chip_flags(dev, &flags);
412 if (!ret)
413 printf("%x\n", flags);
414 }
415 if (ret)
416 return i2c_report_err(ret, I2C_ERR_READ);
417
418 return 0;
419 }
420
do_i2c_olen(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])421 static int do_i2c_olen(struct cmd_tbl *cmdtp, int flag, int argc,
422 char *const argv[])
423 {
424 struct udevice *dev;
425 uint olen;
426 int chip;
427 int ret;
428
429 if (argc < 2)
430 return CMD_RET_USAGE;
431
432 chip = hextoul(argv[1], NULL);
433 ret = i2c_get_cur_bus_chip(chip, &dev);
434 if (ret)
435 return i2c_report_err(ret, I2C_ERR_READ);
436
437 if (argc > 2) {
438 olen = hextoul(argv[2], NULL);
439 ret = i2c_set_chip_offset_len(dev, olen);
440 } else {
441 ret = i2c_get_chip_offset_len(dev);
442 if (ret >= 0) {
443 printf("%x\n", ret);
444 ret = 0;
445 }
446 }
447 if (ret)
448 return i2c_report_err(ret, I2C_ERR_READ);
449
450 return 0;
451 }
452 #endif
453
454 /**
455 * do_i2c_md() - Handle the "i2c md" command-line command
456 * @cmdtp: Command data struct pointer
457 * @flag: Command flag
458 * @argc: Command-line argument count
459 * @argv: Array of command-line arguments
460 *
461 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
462 * on error.
463 *
464 * Syntax:
465 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
466 */
do_i2c_md(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])467 static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
468 char *const argv[])
469 {
470 uint chip;
471 uint addr, length;
472 int alen;
473 int j;
474 uint nbytes, linebytes;
475 int ret;
476 #if CONFIG_IS_ENABLED(DM_I2C)
477 struct udevice *dev;
478 #endif
479
480 /* We use the last specified parameters, unless new ones are
481 * entered.
482 */
483 chip = i2c_dp_last_chip;
484 addr = i2c_dp_last_addr;
485 alen = i2c_dp_last_alen;
486 length = i2c_dp_last_length;
487
488 if (argc < 3)
489 return CMD_RET_USAGE;
490
491 if ((flag & CMD_FLAG_REPEAT) == 0) {
492 /*
493 * New command specified.
494 */
495
496 /*
497 * I2C chip address
498 */
499 chip = hextoul(argv[1], NULL);
500
501 /*
502 * I2C data address within the chip. This can be 1 or
503 * 2 bytes long. Some day it might be 3 bytes long :-).
504 */
505 addr = hextoul(argv[2], NULL);
506 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
507 if (alen > 3)
508 return CMD_RET_USAGE;
509
510 /*
511 * If another parameter, it is the length to display.
512 * Length is the number of objects, not number of bytes.
513 */
514 if (argc > 3)
515 length = hextoul(argv[3], NULL);
516 }
517
518 #if CONFIG_IS_ENABLED(DM_I2C)
519 ret = i2c_get_cur_bus_chip(chip, &dev);
520 if (!ret && alen != -1)
521 ret = i2c_set_chip_offset_len(dev, alen);
522 if (ret)
523 return i2c_report_err(ret, I2C_ERR_READ);
524 #endif
525
526 /*
527 * Print the lines.
528 *
529 * We buffer all read data, so we can make sure data is read only
530 * once.
531 */
532 nbytes = length;
533 do {
534 unsigned char linebuf[DISP_LINE_LEN];
535 unsigned char *cp;
536
537 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
538
539 #if CONFIG_IS_ENABLED(DM_I2C)
540 ret = dm_i2c_read(dev, addr, linebuf, linebytes);
541 #else
542 ret = i2c_read(chip, addr, alen, linebuf, linebytes);
543 #endif
544 if (ret)
545 return i2c_report_err(ret, I2C_ERR_READ);
546 else {
547 printf("%04x:", addr);
548 cp = linebuf;
549 for (j=0; j<linebytes; j++) {
550 printf(" %02x", *cp++);
551 addr++;
552 }
553 puts (" ");
554 cp = linebuf;
555 for (j=0; j<linebytes; j++) {
556 if ((*cp < 0x20) || (*cp > 0x7e))
557 puts (".");
558 else
559 printf("%c", *cp);
560 cp++;
561 }
562 putc ('\n');
563 }
564 nbytes -= linebytes;
565 } while (nbytes > 0);
566
567 i2c_dp_last_chip = chip;
568 i2c_dp_last_addr = addr;
569 i2c_dp_last_alen = alen;
570 i2c_dp_last_length = length;
571
572 return 0;
573 }
574
575 /**
576 * do_i2c_mw() - Handle the "i2c mw" command-line command
577 * @cmdtp: Command data struct pointer
578 * @flag: Command flag
579 * @argc: Command-line argument count
580 * @argv: Array of command-line arguments
581 *
582 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
583 * on error.
584 *
585 * Syntax:
586 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
587 */
do_i2c_mw(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])588 static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
589 char *const argv[])
590 {
591 uint chip;
592 ulong addr;
593 int alen;
594 uchar byte;
595 int count;
596 int ret;
597 #if CONFIG_IS_ENABLED(DM_I2C)
598 struct udevice *dev;
599 #endif
600
601 if ((argc < 4) || (argc > 5))
602 return CMD_RET_USAGE;
603
604 /*
605 * Chip is always specified.
606 */
607 chip = hextoul(argv[1], NULL);
608
609 /*
610 * Address is always specified.
611 */
612 addr = hextoul(argv[2], NULL);
613 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
614 if (alen > 3)
615 return CMD_RET_USAGE;
616
617 #if CONFIG_IS_ENABLED(DM_I2C)
618 ret = i2c_get_cur_bus_chip(chip, &dev);
619 if (!ret && alen != -1)
620 ret = i2c_set_chip_offset_len(dev, alen);
621 if (ret)
622 return i2c_report_err(ret, I2C_ERR_WRITE);
623 #endif
624 /*
625 * Value to write is always specified.
626 */
627 byte = hextoul(argv[3], NULL);
628
629 /*
630 * Optional count
631 */
632 if (argc == 5)
633 count = hextoul(argv[4], NULL);
634 else
635 count = 1;
636
637 while (count-- > 0) {
638 #if CONFIG_IS_ENABLED(DM_I2C)
639 ret = dm_i2c_write(dev, addr++, &byte, 1);
640 #else
641 ret = i2c_write(chip, addr++, alen, &byte, 1);
642 #endif
643 if (ret)
644 return i2c_report_err(ret, I2C_ERR_WRITE);
645 /*
646 * Wait for the write to complete. The write can take
647 * up to 10mSec (we allow a little more time).
648 */
649 /*
650 * No write delay with FRAM devices.
651 */
652 #if !defined(CONFIG_SYS_I2C_FRAM)
653 udelay(11000);
654 #endif
655 }
656
657 return 0;
658 }
659
660 /**
661 * do_i2c_crc() - Handle the "i2c crc32" command-line command
662 * @cmdtp: Command data struct pointer
663 * @flag: Command flag
664 * @argc: Command-line argument count
665 * @argv: Array of command-line arguments
666 *
667 * Calculate a CRC on memory
668 *
669 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
670 * on error.
671 *
672 * Syntax:
673 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
674 */
do_i2c_crc(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])675 static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
676 char *const argv[])
677 {
678 uint chip;
679 ulong addr;
680 int alen;
681 int count;
682 uchar byte;
683 ulong crc;
684 ulong err;
685 int ret = 0;
686 #if CONFIG_IS_ENABLED(DM_I2C)
687 struct udevice *dev;
688 #endif
689
690 if (argc < 4)
691 return CMD_RET_USAGE;
692
693 /*
694 * Chip is always specified.
695 */
696 chip = hextoul(argv[1], NULL);
697
698 /*
699 * Address is always specified.
700 */
701 addr = hextoul(argv[2], NULL);
702 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
703 if (alen > 3)
704 return CMD_RET_USAGE;
705
706 #if CONFIG_IS_ENABLED(DM_I2C)
707 ret = i2c_get_cur_bus_chip(chip, &dev);
708 if (!ret && alen != -1)
709 ret = i2c_set_chip_offset_len(dev, alen);
710 if (ret)
711 return i2c_report_err(ret, I2C_ERR_READ);
712 #endif
713 /*
714 * Count is always specified
715 */
716 count = hextoul(argv[3], NULL);
717
718 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
719 /*
720 * CRC a byte at a time. This is going to be slooow, but hey, the
721 * memories are small and slow too so hopefully nobody notices.
722 */
723 crc = 0;
724 err = 0;
725 while (count-- > 0) {
726 #if CONFIG_IS_ENABLED(DM_I2C)
727 ret = dm_i2c_read(dev, addr, &byte, 1);
728 #else
729 ret = i2c_read(chip, addr, alen, &byte, 1);
730 #endif
731 if (ret)
732 err++;
733 crc = crc32(crc, &byte, 1);
734 addr++;
735 }
736 if (err > 0)
737 i2c_report_err(ret, I2C_ERR_READ);
738 else
739 printf ("%08lx\n", crc);
740
741 return 0;
742 }
743
744 /**
745 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
746 * @cmdtp: Command data struct pointer
747 * @flag: Command flag
748 * @argc: Command-line argument count
749 * @argv: Array of command-line arguments
750 *
751 * Modify memory.
752 *
753 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
754 * on error.
755 *
756 * Syntax:
757 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
758 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
759 */
mod_i2c_mem(struct cmd_tbl * cmdtp,int incrflag,int flag,int argc,char * const argv[])760 static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
761 char *const argv[])
762 {
763 uint chip;
764 ulong addr;
765 int alen;
766 ulong data;
767 int size = 1;
768 int nbytes;
769 int ret;
770 #if CONFIG_IS_ENABLED(DM_I2C)
771 struct udevice *dev;
772 #endif
773
774 if (argc != 3)
775 return CMD_RET_USAGE;
776
777 bootretry_reset_cmd_timeout(); /* got a good command to get here */
778 /*
779 * We use the last specified parameters, unless new ones are
780 * entered.
781 */
782 chip = i2c_mm_last_chip;
783 addr = i2c_mm_last_addr;
784 alen = i2c_mm_last_alen;
785
786 if ((flag & CMD_FLAG_REPEAT) == 0) {
787 /*
788 * New command specified. Check for a size specification.
789 * Defaults to byte if no or incorrect specification.
790 */
791 size = cmd_get_data_size(argv[0], 1);
792
793 /*
794 * Chip is always specified.
795 */
796 chip = hextoul(argv[1], NULL);
797
798 /*
799 * Address is always specified.
800 */
801 addr = hextoul(argv[2], NULL);
802 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
803 if (alen > 3)
804 return CMD_RET_USAGE;
805 }
806
807 #if CONFIG_IS_ENABLED(DM_I2C)
808 ret = i2c_get_cur_bus_chip(chip, &dev);
809 if (!ret && alen != -1)
810 ret = i2c_set_chip_offset_len(dev, alen);
811 if (ret)
812 return i2c_report_err(ret, I2C_ERR_WRITE);
813 #endif
814
815 /*
816 * Print the address, followed by value. Then accept input for
817 * the next value. A non-converted value exits.
818 */
819 do {
820 printf("%08lx:", addr);
821 #if CONFIG_IS_ENABLED(DM_I2C)
822 ret = dm_i2c_read(dev, addr, (uchar *)&data, size);
823 #else
824 ret = i2c_read(chip, addr, alen, (uchar *)&data, size);
825 #endif
826 if (ret)
827 return i2c_report_err(ret, I2C_ERR_READ);
828
829 data = cpu_to_be32(data);
830 if (size == 1)
831 printf(" %02lx", (data >> 24) & 0x000000FF);
832 else if (size == 2)
833 printf(" %04lx", (data >> 16) & 0x0000FFFF);
834 else
835 printf(" %08lx", data);
836
837 nbytes = cli_readline(" ? ");
838 if (nbytes == 0) {
839 /*
840 * <CR> pressed as only input, don't modify current
841 * location and move to next.
842 */
843 if (incrflag)
844 addr += size;
845 nbytes = size;
846 /* good enough to not time out */
847 bootretry_reset_cmd_timeout();
848 }
849 #ifdef CONFIG_BOOT_RETRY_TIME
850 else if (nbytes == -2)
851 break; /* timed out, exit the command */
852 #endif
853 else {
854 char *endp;
855
856 data = hextoul(console_buffer, &endp);
857 if (size == 1)
858 data = data << 24;
859 else if (size == 2)
860 data = data << 16;
861 data = be32_to_cpu(data);
862 nbytes = endp - console_buffer;
863 if (nbytes) {
864 /*
865 * good enough to not time out
866 */
867 bootretry_reset_cmd_timeout();
868 #if CONFIG_IS_ENABLED(DM_I2C)
869 ret = dm_i2c_write(dev, addr, (uchar *)&data,
870 size);
871 #else
872 ret = i2c_write(chip, addr, alen,
873 (uchar *)&data, size);
874 #endif
875 if (ret)
876 return i2c_report_err(ret,
877 I2C_ERR_WRITE);
878 #if CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS > 0
879 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
880 #endif
881 if (incrflag)
882 addr += size;
883 }
884 }
885 } while (nbytes);
886
887 i2c_mm_last_chip = chip;
888 i2c_mm_last_addr = addr;
889 i2c_mm_last_alen = alen;
890
891 return 0;
892 }
893
894 /**
895 * do_i2c_probe() - Handle the "i2c probe" command-line command
896 * @cmdtp: Command data struct pointer
897 * @flag: Command flag
898 * @argc: Command-line argument count
899 * @argv: Array of command-line arguments
900 *
901 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
902 * on error.
903 *
904 * Syntax:
905 * i2c probe {addr}
906 *
907 * Returns zero (success) if one or more I2C devices was found
908 */
do_i2c_probe(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])909 static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
910 char *const argv[])
911 {
912 int j;
913 int addr = -1;
914 int found = 0;
915 #if defined(CFG_SYS_I2C_NOPROBES)
916 int k, skip;
917 unsigned int bus = GET_BUS_NUM;
918 #endif /* NOPROBES */
919 int ret;
920 #if CONFIG_IS_ENABLED(DM_I2C)
921 struct udevice *cur_bus, *dev;
922
923 if (i2c_get_cur_bus(&cur_bus))
924 return CMD_RET_FAILURE;
925 #endif
926
927 if (argc == 2)
928 addr = simple_strtol(argv[1], 0, 16);
929
930 puts ("Valid chip addresses:");
931 for (j = 0; j < 128; j++) {
932 if ((0 <= addr) && (j != addr))
933 continue;
934
935 #if defined(CFG_SYS_I2C_NOPROBES)
936 skip = 0;
937 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
938 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
939 skip = 1;
940 break;
941 }
942 }
943 if (skip)
944 continue;
945 #endif
946 #if CONFIG_IS_ENABLED(DM_I2C)
947 ret = dm_i2c_probe(cur_bus, j, 0, &dev);
948 #else
949 ret = i2c_probe(j);
950 #endif
951 if (ret == 0) {
952 printf(" %02X", j);
953 found++;
954 }
955 }
956 putc ('\n');
957
958 #if defined(CFG_SYS_I2C_NOPROBES)
959 puts ("Excluded chip addresses:");
960 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
961 if (COMPARE_BUS(bus,k))
962 printf(" %02X", NO_PROBE_ADDR(k));
963 }
964 putc ('\n');
965 #endif
966
967 return (0 == found);
968 }
969
970 /**
971 * do_i2c_loop() - Handle the "i2c loop" command-line command
972 * @cmdtp: Command data struct pointer
973 * @flag: Command flag
974 * @argc: Command-line argument count
975 * @argv: Array of command-line arguments
976 *
977 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
978 * on error.
979 *
980 * Syntax:
981 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
982 * {length} - Number of bytes to read
983 * {delay} - A DECIMAL number and defaults to 1000 uSec
984 */
do_i2c_loop(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])985 static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
986 char *const argv[])
987 {
988 uint chip;
989 int alen;
990 uint addr;
991 uint length;
992 u_char bytes[16];
993 int delay;
994 int ret;
995 #if CONFIG_IS_ENABLED(DM_I2C)
996 struct udevice *dev;
997 #endif
998
999 if (argc < 3)
1000 return CMD_RET_USAGE;
1001
1002 /*
1003 * Chip is always specified.
1004 */
1005 chip = hextoul(argv[1], NULL);
1006
1007 /*
1008 * Address is always specified.
1009 */
1010 addr = hextoul(argv[2], NULL);
1011 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
1012 if (alen > 3)
1013 return CMD_RET_USAGE;
1014 #if CONFIG_IS_ENABLED(DM_I2C)
1015 ret = i2c_get_cur_bus_chip(chip, &dev);
1016 if (!ret && alen != -1)
1017 ret = i2c_set_chip_offset_len(dev, alen);
1018 if (ret)
1019 return i2c_report_err(ret, I2C_ERR_WRITE);
1020 #endif
1021
1022 /*
1023 * Length is the number of objects, not number of bytes.
1024 */
1025 length = 1;
1026 length = hextoul(argv[3], NULL);
1027 if (length > sizeof(bytes))
1028 length = sizeof(bytes);
1029
1030 /*
1031 * The delay time (uSec) is optional.
1032 */
1033 delay = 1000;
1034 if (argc > 3)
1035 delay = dectoul(argv[4], NULL);
1036 /*
1037 * Run the loop...
1038 */
1039 while (1) {
1040 #if CONFIG_IS_ENABLED(DM_I2C)
1041 ret = dm_i2c_read(dev, addr, bytes, length);
1042 #else
1043 ret = i2c_read(chip, addr, alen, bytes, length);
1044 #endif
1045 if (ret)
1046 i2c_report_err(ret, I2C_ERR_READ);
1047 udelay(delay);
1048 }
1049
1050 /* NOTREACHED */
1051 return 0;
1052 }
1053
1054 /*
1055 * The SDRAM command is separately configured because many
1056 * (most?) embedded boards don't use SDRAM DIMMs.
1057 *
1058 * FIXME: Document and probably move elsewhere!
1059 */
1060 #if defined(CONFIG_CMD_SDRAM)
print_ddr2_tcyc(u_char const b)1061 static void print_ddr2_tcyc (u_char const b)
1062 {
1063 printf ("%d.", (b >> 4) & 0x0F);
1064 switch (b & 0x0F) {
1065 case 0x0:
1066 case 0x1:
1067 case 0x2:
1068 case 0x3:
1069 case 0x4:
1070 case 0x5:
1071 case 0x6:
1072 case 0x7:
1073 case 0x8:
1074 case 0x9:
1075 printf ("%d ns\n", b & 0x0F);
1076 break;
1077 case 0xA:
1078 puts ("25 ns\n");
1079 break;
1080 case 0xB:
1081 puts ("33 ns\n");
1082 break;
1083 case 0xC:
1084 puts ("66 ns\n");
1085 break;
1086 case 0xD:
1087 puts ("75 ns\n");
1088 break;
1089 default:
1090 puts ("?? ns\n");
1091 break;
1092 }
1093 }
1094
decode_bits(u_char const b,char const * str[],int const do_once)1095 static void decode_bits (u_char const b, char const *str[], int const do_once)
1096 {
1097 u_char mask;
1098
1099 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
1100 if (b & mask) {
1101 puts (*str);
1102 if (do_once)
1103 return;
1104 }
1105 }
1106 }
1107
1108 /*
1109 * Syntax:
1110 * i2c sdram {i2c_chip}
1111 */
do_sdram(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1112 static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
1113 char *const argv[])
1114 {
1115 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;
1116
1117 uint chip;
1118 u_char data[128];
1119 u_char cksum;
1120 int j, ret;
1121 #if CONFIG_IS_ENABLED(DM_I2C)
1122 struct udevice *dev;
1123 #endif
1124
1125 static const char *decode_CAS_DDR2[] = {
1126 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
1127 };
1128
1129 static const char *decode_CAS_default[] = {
1130 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
1131 };
1132
1133 static const char *decode_CS_WE_default[] = {
1134 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
1135 };
1136
1137 static const char *decode_byte21_default[] = {
1138 " TBD (bit 7)\n",
1139 " Redundant row address\n",
1140 " Differential clock input\n",
1141 " Registerd DQMB inputs\n",
1142 " Buffered DQMB inputs\n",
1143 " On-card PLL\n",
1144 " Registered address/control lines\n",
1145 " Buffered address/control lines\n"
1146 };
1147
1148 static const char *decode_byte22_DDR2[] = {
1149 " TBD (bit 7)\n",
1150 " TBD (bit 6)\n",
1151 " TBD (bit 5)\n",
1152 " TBD (bit 4)\n",
1153 " TBD (bit 3)\n",
1154 " Supports partial array self refresh\n",
1155 " Supports 50 ohm ODT\n",
1156 " Supports weak driver\n"
1157 };
1158
1159 static const char *decode_row_density_DDR2[] = {
1160 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
1161 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
1162 };
1163
1164 static const char *decode_row_density_default[] = {
1165 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
1166 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
1167 };
1168
1169 if (argc < 2)
1170 return CMD_RET_USAGE;
1171
1172 /*
1173 * Chip is always specified.
1174 */
1175 chip = hextoul(argv[1], NULL);
1176
1177 #if CONFIG_IS_ENABLED(DM_I2C)
1178 ret = i2c_get_cur_bus_chip(chip, &dev);
1179 if (!ret)
1180 ret = dm_i2c_read(dev, 0, data, sizeof(data));
1181 #else
1182 ret = i2c_read(chip, 0, 1, data, sizeof(data));
1183 #endif
1184 if (ret) {
1185 puts ("No SDRAM Serial Presence Detect found.\n");
1186 return 1;
1187 }
1188
1189 cksum = 0;
1190 for (j = 0; j < 63; j++) {
1191 cksum += data[j];
1192 }
1193 if (cksum != data[63]) {
1194 printf ("WARNING: Configuration data checksum failure:\n"
1195 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
1196 }
1197 printf ("SPD data revision %d.%d\n",
1198 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
1199 printf ("Bytes used 0x%02X\n", data[0]);
1200 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
1201
1202 puts ("Memory type ");
1203 switch (data[2]) {
1204 case 2:
1205 type = EDO;
1206 puts ("EDO\n");
1207 break;
1208 case 4:
1209 type = SDRAM;
1210 puts ("SDRAM\n");
1211 break;
1212 case 7:
1213 type = DDR;
1214 puts("DDR\n");
1215 break;
1216 case 8:
1217 type = DDR2;
1218 puts ("DDR2\n");
1219 break;
1220 case 11:
1221 type = DDR3;
1222 puts("DDR3\n");
1223 break;
1224 case 12:
1225 type = DDR4;
1226 puts("DDR4\n");
1227 break;
1228 default:
1229 type = unknown;
1230 puts ("unknown\n");
1231 break;
1232 }
1233
1234 puts ("Row address bits ");
1235 if ((data[3] & 0x00F0) == 0)
1236 printf ("%d\n", data[3] & 0x0F);
1237 else
1238 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
1239
1240 puts ("Column address bits ");
1241 if ((data[4] & 0x00F0) == 0)
1242 printf ("%d\n", data[4] & 0x0F);
1243 else
1244 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
1245
1246 switch (type) {
1247 case DDR2:
1248 printf ("Number of ranks %d\n",
1249 (data[5] & 0x07) + 1);
1250 break;
1251 default:
1252 printf ("Module rows %d\n", data[5]);
1253 break;
1254 }
1255
1256 switch (type) {
1257 case DDR2:
1258 printf ("Module data width %d bits\n", data[6]);
1259 break;
1260 default:
1261 printf ("Module data width %d bits\n",
1262 (data[7] << 8) | data[6]);
1263 break;
1264 }
1265
1266 puts ("Interface signal levels ");
1267 switch(data[8]) {
1268 case 0: puts ("TTL 5.0 V\n"); break;
1269 case 1: puts ("LVTTL\n"); break;
1270 case 2: puts ("HSTL 1.5 V\n"); break;
1271 case 3: puts ("SSTL 3.3 V\n"); break;
1272 case 4: puts ("SSTL 2.5 V\n"); break;
1273 case 5: puts ("SSTL 1.8 V\n"); break;
1274 default: puts ("unknown\n"); break;
1275 }
1276
1277 switch (type) {
1278 case DDR2:
1279 printf ("SDRAM cycle time ");
1280 print_ddr2_tcyc (data[9]);
1281 break;
1282 default:
1283 printf ("SDRAM cycle time %d.%d ns\n",
1284 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
1285 break;
1286 }
1287
1288 switch (type) {
1289 case DDR2:
1290 printf ("SDRAM access time 0.%d%d ns\n",
1291 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
1292 break;
1293 default:
1294 printf ("SDRAM access time %d.%d ns\n",
1295 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
1296 break;
1297 }
1298
1299 puts ("EDC configuration ");
1300 switch (data[11]) {
1301 case 0: puts ("None\n"); break;
1302 case 1: puts ("Parity\n"); break;
1303 case 2: puts ("ECC\n"); break;
1304 default: puts ("unknown\n"); break;
1305 }
1306
1307 if ((data[12] & 0x80) == 0)
1308 puts ("No self refresh, rate ");
1309 else
1310 puts ("Self refresh, rate ");
1311
1312 switch(data[12] & 0x7F) {
1313 case 0: puts ("15.625 us\n"); break;
1314 case 1: puts ("3.9 us\n"); break;
1315 case 2: puts ("7.8 us\n"); break;
1316 case 3: puts ("31.3 us\n"); break;
1317 case 4: puts ("62.5 us\n"); break;
1318 case 5: puts ("125 us\n"); break;
1319 default: puts ("unknown\n"); break;
1320 }
1321
1322 switch (type) {
1323 case DDR2:
1324 printf ("SDRAM width (primary) %d\n", data[13]);
1325 break;
1326 default:
1327 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
1328 if ((data[13] & 0x80) != 0) {
1329 printf (" (second bank) %d\n",
1330 2 * (data[13] & 0x7F));
1331 }
1332 break;
1333 }
1334
1335 switch (type) {
1336 case DDR2:
1337 if (data[14] != 0)
1338 printf ("EDC width %d\n", data[14]);
1339 break;
1340 default:
1341 if (data[14] != 0) {
1342 printf ("EDC width %d\n",
1343 data[14] & 0x7F);
1344
1345 if ((data[14] & 0x80) != 0) {
1346 printf (" (second bank) %d\n",
1347 2 * (data[14] & 0x7F));
1348 }
1349 }
1350 break;
1351 }
1352
1353 if (DDR2 != type) {
1354 printf ("Min clock delay, back-to-back random column addresses "
1355 "%d\n", data[15]);
1356 }
1357
1358 puts ("Burst length(s) ");
1359 if (data[16] & 0x80) puts (" Page");
1360 if (data[16] & 0x08) puts (" 8");
1361 if (data[16] & 0x04) puts (" 4");
1362 if (data[16] & 0x02) puts (" 2");
1363 if (data[16] & 0x01) puts (" 1");
1364 putc ('\n');
1365 printf ("Number of banks %d\n", data[17]);
1366
1367 switch (type) {
1368 case DDR2:
1369 puts ("CAS latency(s) ");
1370 decode_bits (data[18], decode_CAS_DDR2, 0);
1371 putc ('\n');
1372 break;
1373 default:
1374 puts ("CAS latency(s) ");
1375 decode_bits (data[18], decode_CAS_default, 0);
1376 putc ('\n');
1377 break;
1378 }
1379
1380 if (DDR2 != type) {
1381 puts ("CS latency(s) ");
1382 decode_bits (data[19], decode_CS_WE_default, 0);
1383 putc ('\n');
1384 }
1385
1386 if (DDR2 != type) {
1387 puts ("WE latency(s) ");
1388 decode_bits (data[20], decode_CS_WE_default, 0);
1389 putc ('\n');
1390 }
1391
1392 switch (type) {
1393 case DDR2:
1394 puts ("Module attributes:\n");
1395 if (data[21] & 0x80)
1396 puts (" TBD (bit 7)\n");
1397 if (data[21] & 0x40)
1398 puts (" Analysis probe installed\n");
1399 if (data[21] & 0x20)
1400 puts (" TBD (bit 5)\n");
1401 if (data[21] & 0x10)
1402 puts (" FET switch external enable\n");
1403 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
1404 if (data[20] & 0x11) {
1405 printf (" %d active registers on DIMM\n",
1406 (data[21] & 0x03) + 1);
1407 }
1408 break;
1409 default:
1410 puts ("Module attributes:\n");
1411 if (!data[21])
1412 puts (" (none)\n");
1413 else
1414 decode_bits (data[21], decode_byte21_default, 0);
1415 break;
1416 }
1417
1418 switch (type) {
1419 case DDR2:
1420 decode_bits (data[22], decode_byte22_DDR2, 0);
1421 break;
1422 default:
1423 puts ("Device attributes:\n");
1424 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1425 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1426 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1427 else puts (" Upper Vcc tolerance 10%\n");
1428 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1429 else puts (" Lower Vcc tolerance 10%\n");
1430 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1431 if (data[22] & 0x04) puts (" Supports precharge all\n");
1432 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1433 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1434 break;
1435 }
1436
1437 switch (type) {
1438 case DDR2:
1439 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1440 print_ddr2_tcyc (data[23]);
1441 break;
1442 default:
1443 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1444 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1445 break;
1446 }
1447
1448 switch (type) {
1449 case DDR2:
1450 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1451 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1452 break;
1453 default:
1454 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1455 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1456 break;
1457 }
1458
1459 switch (type) {
1460 case DDR2:
1461 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1462 print_ddr2_tcyc (data[25]);
1463 break;
1464 default:
1465 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1466 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1467 break;
1468 }
1469
1470 switch (type) {
1471 case DDR2:
1472 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1473 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1474 break;
1475 default:
1476 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1477 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1478 break;
1479 }
1480
1481 switch (type) {
1482 case DDR2:
1483 printf ("Minimum row precharge %d.%02d ns\n",
1484 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1485 break;
1486 default:
1487 printf ("Minimum row precharge %d ns\n", data[27]);
1488 break;
1489 }
1490
1491 switch (type) {
1492 case DDR2:
1493 printf ("Row active to row active min %d.%02d ns\n",
1494 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1495 break;
1496 default:
1497 printf ("Row active to row active min %d ns\n", data[28]);
1498 break;
1499 }
1500
1501 switch (type) {
1502 case DDR2:
1503 printf ("RAS to CAS delay min %d.%02d ns\n",
1504 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1505 break;
1506 default:
1507 printf ("RAS to CAS delay min %d ns\n", data[29]);
1508 break;
1509 }
1510
1511 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1512
1513 switch (type) {
1514 case DDR2:
1515 puts ("Density of each row ");
1516 decode_bits (data[31], decode_row_density_DDR2, 1);
1517 putc ('\n');
1518 break;
1519 default:
1520 puts ("Density of each row ");
1521 decode_bits (data[31], decode_row_density_default, 1);
1522 putc ('\n');
1523 break;
1524 }
1525
1526 switch (type) {
1527 case DDR2:
1528 puts ("Command and Address setup ");
1529 if (data[32] >= 0xA0) {
1530 printf ("1.%d%d ns\n",
1531 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1532 } else {
1533 printf ("0.%d%d ns\n",
1534 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1535 }
1536 break;
1537 default:
1538 printf ("Command and Address setup %c%d.%d ns\n",
1539 (data[32] & 0x80) ? '-' : '+',
1540 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1541 break;
1542 }
1543
1544 switch (type) {
1545 case DDR2:
1546 puts ("Command and Address hold ");
1547 if (data[33] >= 0xA0) {
1548 printf ("1.%d%d ns\n",
1549 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1550 } else {
1551 printf ("0.%d%d ns\n",
1552 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1553 }
1554 break;
1555 default:
1556 printf ("Command and Address hold %c%d.%d ns\n",
1557 (data[33] & 0x80) ? '-' : '+',
1558 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1559 break;
1560 }
1561
1562 switch (type) {
1563 case DDR2:
1564 printf ("Data signal input setup 0.%d%d ns\n",
1565 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1566 break;
1567 default:
1568 printf ("Data signal input setup %c%d.%d ns\n",
1569 (data[34] & 0x80) ? '-' : '+',
1570 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1571 break;
1572 }
1573
1574 switch (type) {
1575 case DDR2:
1576 printf ("Data signal input hold 0.%d%d ns\n",
1577 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1578 break;
1579 default:
1580 printf ("Data signal input hold %c%d.%d ns\n",
1581 (data[35] & 0x80) ? '-' : '+',
1582 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1583 break;
1584 }
1585
1586 puts ("Manufacturer's JEDEC ID ");
1587 for (j = 64; j <= 71; j++)
1588 printf ("%02X ", data[j]);
1589 putc ('\n');
1590 printf ("Manufacturing Location %02X\n", data[72]);
1591 puts ("Manufacturer's Part Number ");
1592 for (j = 73; j <= 90; j++)
1593 printf ("%02X ", data[j]);
1594 putc ('\n');
1595 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1596 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1597 puts ("Assembly Serial Number ");
1598 for (j = 95; j <= 98; j++)
1599 printf ("%02X ", data[j]);
1600 putc ('\n');
1601
1602 if (DDR2 != type) {
1603 printf ("Speed rating PC%d\n",
1604 data[126] == 0x66 ? 66 : data[126]);
1605 }
1606 return 0;
1607 }
1608 #endif
1609
1610 /*
1611 * Syntax:
1612 * i2c edid {i2c_chip}
1613 */
1614 #if defined(CONFIG_I2C_EDID)
do_edid(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1615 int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
1616 {
1617 uint chip;
1618 struct edid1_info edid;
1619 int ret;
1620 #if CONFIG_IS_ENABLED(DM_I2C)
1621 struct udevice *dev;
1622 #endif
1623
1624 if (argc < 2) {
1625 cmd_usage(cmdtp);
1626 return 1;
1627 }
1628
1629 chip = hextoul(argv[1], NULL);
1630 #if CONFIG_IS_ENABLED(DM_I2C)
1631 ret = i2c_get_cur_bus_chip(chip, &dev);
1632 if (!ret)
1633 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
1634 #else
1635 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid));
1636 #endif
1637 if (ret)
1638 return i2c_report_err(ret, I2C_ERR_READ);
1639
1640 if (edid_check_info(&edid)) {
1641 puts("Content isn't valid EDID.\n");
1642 return 1;
1643 }
1644
1645 edid_print_info(&edid);
1646 return 0;
1647
1648 }
1649 #endif /* CONFIG_I2C_EDID */
1650
1651 #if CONFIG_IS_ENABLED(DM_I2C)
show_bus(struct udevice * bus)1652 static void show_bus(struct udevice *bus)
1653 {
1654 struct udevice *dev;
1655
1656 printf("Bus %d:\t%s", dev_seq(bus), bus->name);
1657 if (device_active(bus))
1658 printf(" (active %d)", dev_seq(bus));
1659 printf("\n");
1660 for (device_find_first_child(bus, &dev);
1661 dev;
1662 device_find_next_child(&dev)) {
1663 struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
1664
1665 printf(" %02x: %s, offset len %x, flags %x\n",
1666 chip->chip_addr, dev->name, chip->offset_len,
1667 chip->flags);
1668 }
1669 }
1670 #endif
1671
1672 /**
1673 * do_i2c_show_bus() - Handle the "i2c bus" command-line command
1674 * @cmdtp: Command data struct pointer
1675 * @flag: Command flag
1676 * @argc: Command-line argument count
1677 * @argv: Array of command-line arguments
1678 *
1679 * Returns zero always.
1680 */
1681 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
do_i2c_show_bus(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1682 static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
1683 char *const argv[])
1684 {
1685 if (argc == 1) {
1686 /* show all busses */
1687 #if CONFIG_IS_ENABLED(DM_I2C)
1688 struct udevice *bus;
1689 struct uclass *uc;
1690 int ret;
1691
1692 ret = uclass_get(UCLASS_I2C, &uc);
1693 if (ret)
1694 return CMD_RET_FAILURE;
1695 uclass_foreach_dev(bus, uc)
1696 show_bus(bus);
1697 #else
1698 int i;
1699
1700 for (i = 0; i < CFG_SYS_NUM_I2C_BUSES; i++) {
1701 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1702 printf("\n");
1703 }
1704 #endif
1705 } else {
1706 int i;
1707
1708 /* show specific bus */
1709 i = dectoul(argv[1], NULL);
1710 #if CONFIG_IS_ENABLED(DM_I2C)
1711 struct udevice *bus;
1712 int ret;
1713
1714 ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus);
1715 if (ret) {
1716 printf("Invalid bus %d: err=%d\n", i, ret);
1717 return CMD_RET_FAILURE;
1718 }
1719 show_bus(bus);
1720 #else
1721 if (i >= CFG_SYS_NUM_I2C_BUSES) {
1722 printf("Invalid bus %d\n", i);
1723 return -1;
1724 }
1725 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1726 printf("\n");
1727 #endif
1728 }
1729
1730 return 0;
1731 }
1732 #endif
1733
1734 /**
1735 * do_i2c_bus_num() - Handle the "i2c dev" command-line command
1736 * @cmdtp: Command data struct pointer
1737 * @flag: Command flag
1738 * @argc: Command-line argument count
1739 * @argv: Array of command-line arguments
1740 *
1741 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1742 * on error.
1743 */
1744 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
do_i2c_bus_num(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1745 static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
1746 char *const argv[])
1747 {
1748 int ret = 0;
1749 int bus_no;
1750
1751 if (argc == 1) {
1752 /* querying current setting */
1753 #if CONFIG_IS_ENABLED(DM_I2C)
1754 struct udevice *bus;
1755
1756 if (!i2c_get_cur_bus(&bus))
1757 bus_no = dev_seq(bus);
1758 else
1759 bus_no = -1;
1760 #else
1761 bus_no = i2c_get_bus_num();
1762 #endif
1763 printf("Current bus is %d\n", bus_no);
1764 } else {
1765 bus_no = dectoul(argv[1], NULL);
1766 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
1767 if (bus_no >= CFG_SYS_NUM_I2C_BUSES) {
1768 printf("Invalid bus %d\n", bus_no);
1769 return -1;
1770 }
1771 #endif
1772 printf("Setting bus to %d\n", bus_no);
1773 #if CONFIG_IS_ENABLED(DM_I2C)
1774 ret = cmd_i2c_set_bus_num(bus_no);
1775 #else
1776 ret = i2c_set_bus_num(bus_no);
1777 #endif
1778 if (ret)
1779 printf("Failure changing bus number (%d)\n", ret);
1780 }
1781
1782 return ret ? CMD_RET_FAILURE : 0;
1783 }
1784 #endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
1785
1786 /**
1787 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
1788 * @cmdtp: Command data struct pointer
1789 * @flag: Command flag
1790 * @argc: Command-line argument count
1791 * @argv: Array of command-line arguments
1792 *
1793 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1794 * on error.
1795 */
do_i2c_bus_speed(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1796 static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
1797 char *const argv[])
1798 {
1799 int speed, ret=0;
1800
1801 #if CONFIG_IS_ENABLED(DM_I2C)
1802 struct udevice *bus;
1803
1804 if (i2c_get_cur_bus(&bus))
1805 return 1;
1806 #endif
1807 if (argc == 1) {
1808 #if CONFIG_IS_ENABLED(DM_I2C)
1809 speed = dm_i2c_get_bus_speed(bus);
1810 #else
1811 speed = i2c_get_bus_speed();
1812 #endif
1813 /* querying current speed */
1814 printf("Current bus speed=%d\n", speed);
1815 } else {
1816 speed = dectoul(argv[1], NULL);
1817 printf("Setting bus speed to %d Hz\n", speed);
1818 #if CONFIG_IS_ENABLED(DM_I2C)
1819 ret = dm_i2c_set_bus_speed(bus, speed);
1820 #else
1821 ret = i2c_set_bus_speed(speed);
1822 #endif
1823 if (ret)
1824 printf("Failure changing bus speed (%d)\n", ret);
1825 }
1826
1827 return ret ? CMD_RET_FAILURE : 0;
1828 }
1829
1830 /**
1831 * do_i2c_mm() - Handle the "i2c mm" command-line command
1832 * @cmdtp: Command data struct pointer
1833 * @flag: Command flag
1834 * @argc: Command-line argument count
1835 * @argv: Array of command-line arguments
1836 *
1837 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1838 * on error.
1839 */
do_i2c_mm(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1840 static int do_i2c_mm(struct cmd_tbl *cmdtp, int flag, int argc,
1841 char *const argv[])
1842 {
1843 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1844 }
1845
1846 /**
1847 * do_i2c_nm() - Handle the "i2c nm" command-line command
1848 * @cmdtp: Command data struct pointer
1849 * @flag: Command flag
1850 * @argc: Command-line argument count
1851 * @argv: Array of command-line arguments
1852 *
1853 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1854 * on error.
1855 */
do_i2c_nm(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1856 static int do_i2c_nm(struct cmd_tbl *cmdtp, int flag, int argc,
1857 char *const argv[])
1858 {
1859 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1860 }
1861
1862 /**
1863 * do_i2c_reset() - Handle the "i2c reset" command-line command
1864 * @cmdtp: Command data struct pointer
1865 * @flag: Command flag
1866 * @argc: Command-line argument count
1867 * @argv: Array of command-line arguments
1868 *
1869 * Returns zero always.
1870 */
do_i2c_reset(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1871 static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
1872 char *const argv[])
1873 {
1874 #if CONFIG_IS_ENABLED(DM_I2C)
1875 struct udevice *bus;
1876
1877 if (i2c_get_cur_bus(&bus))
1878 return CMD_RET_FAILURE;
1879 if (i2c_deblock(bus)) {
1880 printf("Error: Not supported by the driver\n");
1881 return CMD_RET_FAILURE;
1882 }
1883 #elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
1884 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
1885 #endif
1886 return 0;
1887 }
1888
1889 static struct cmd_tbl cmd_i2c_sub[] = {
1890 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
1891 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
1892 #endif
1893 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
1894 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
1895 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
1896 #endif
1897 #if defined(CONFIG_I2C_EDID)
1898 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
1899 #endif /* CONFIG_I2C_EDID */
1900 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1901 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1902 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1903 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1904 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1905 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
1906 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
1907 U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
1908 #if CONFIG_IS_ENABLED(DM_I2C)
1909 U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
1910 U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""),
1911 #endif
1912 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
1913 #if defined(CONFIG_CMD_SDRAM)
1914 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
1915 #endif
1916 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1917 };
1918
1919 /**
1920 * do_i2c() - Handle the "i2c" command-line command
1921 * @cmdtp: Command data struct pointer
1922 * @flag: Command flag
1923 * @argc: Command-line argument count
1924 * @argv: Array of command-line arguments
1925 *
1926 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1927 * on error.
1928 */
do_i2c(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])1929 static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
1930 {
1931 struct cmd_tbl *c;
1932
1933 if (argc < 2)
1934 return CMD_RET_USAGE;
1935
1936 /* Strip off leading 'i2c' command argument */
1937 argc--;
1938 argv++;
1939
1940 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
1941
1942 if (c)
1943 return c->cmd(cmdtp, flag, argc, argv);
1944 else
1945 return CMD_RET_USAGE;
1946 }
1947
1948 /***************************************************/
1949 U_BOOT_LONGHELP(i2c,
1950 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
1951 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
1952 "i2c " /* That's the prefix for the crc32 command below. */
1953 #endif
1954 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1955 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
1956 "i2c dev [dev] - show or set current I2C bus\n"
1957 #endif
1958 #if defined(CONFIG_I2C_EDID)
1959 "i2c edid chip - print EDID configuration information\n"
1960 #endif /* CONFIG_I2C_EDID */
1961 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
1962 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1963 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1964 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1965 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1966 "i2c probe [address] - test for and show device(s) on the I2C bus\n"
1967 "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
1968 "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
1969 " to I2C; the -s option selects bulk write in a single transaction\n"
1970 #if CONFIG_IS_ENABLED(DM_I2C)
1971 "i2c flags chip [flags] - set or get chip flags\n"
1972 "i2c olen chip [offset_length] - set or get chip offset length\n"
1973 #endif
1974 "i2c reset - re-init the I2C Controller\n"
1975 #if defined(CONFIG_CMD_SDRAM)
1976 "i2c sdram chip - print SDRAM configuration information\n"
1977 #endif
1978 "i2c speed [speed] - show or set I2C bus speed");
1979
1980 U_BOOT_CMD(
1981 i2c, 7, 1, do_i2c,
1982 "I2C sub-system",
1983 i2c_help_text
1984 );
1985