1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
10 */
11
12 #include <config.h>
13 #include <api.h>
14 #include <bootstage.h>
15 #include <cpu_func.h>
16 #include <cyclic.h>
17 #include <display_options.h>
18 #include <exports.h>
19 #ifdef CONFIG_MTD_NOR_FLASH
20 #include <flash.h>
21 #endif
22 #include <hang.h>
23 #include <image.h>
24 #include <irq_func.h>
25 #include <lmb.h>
26 #include <log.h>
27 #include <net.h>
28 #include <asm/cache.h>
29 #include <asm/global_data.h>
30 #include <u-boot/crc.h>
31 #include <binman.h>
32 #include <command.h>
33 #include <console.h>
34 #include <dm.h>
35 #include <efi_loader.h>
36 #include <env.h>
37 #include <env_internal.h>
38 #include <fdtdec.h>
39 #include <init.h>
40 #include <initcall.h>
41 #include <kgdb.h>
42 #include <irq_func.h>
43 #include <led.h>
44 #include <malloc.h>
45 #include <mapmem.h>
46 #include <miiphy.h>
47 #include <mmc.h>
48 #include <mux.h>
49 #include <nand.h>
50 #include <of_live.h>
51 #include <onenand_uboot.h>
52 #include <pvblock.h>
53 #include <scsi.h>
54 #include <serial.h>
55 #include <status_led.h>
56 #include <stdio_dev.h>
57 #include <timer.h>
58 #include <trace.h>
59 #include <watchdog.h>
60 #include <xen.h>
61 #include <asm/sections.h>
62 #include <dm/root.h>
63 #include <dm/ofnode.h>
64 #include <linux/compiler.h>
65 #include <linux/err.h>
66 #include <wdt.h>
67 #include <asm-generic/gpio.h>
68 #include <relocate.h>
69
70 DECLARE_GLOBAL_DATA_PTR;
71
72 ulong monitor_flash_len;
73
board_flash_wp_on(void)74 __weak int board_flash_wp_on(void)
75 {
76 /*
77 * Most flashes can't be detected when write protection is enabled,
78 * so provide a way to let U-Boot gracefully ignore write protected
79 * devices.
80 */
81 return 0;
82 }
83
cpu_secondary_init_r(void)84 __weak int cpu_secondary_init_r(void)
85 {
86 return 0;
87 }
88
initr_trace(void)89 static int initr_trace(void)
90 {
91 #ifdef CONFIG_TRACE
92 trace_init(gd->trace_buff, CONFIG_TRACE_BUFFER_SIZE);
93 #endif
94
95 return 0;
96 }
97
initr_reloc(void)98 static int initr_reloc(void)
99 {
100 /* tell others: relocation done */
101 gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT;
102
103 return 0;
104 }
105
106 #if defined(CONFIG_ARM) || defined(CONFIG_RISCV)
107 /*
108 * Some of these functions are needed purely because the functions they
109 * call return void. If we change them to return 0, these stubs can go away.
110 */
initr_caches(void)111 static int initr_caches(void)
112 {
113 /* Enable caches */
114 enable_caches();
115 return 0;
116 }
117 #endif
118
fixup_cpu(void)119 __weak int fixup_cpu(void)
120 {
121 return 0;
122 }
123
initr_reloc_global_data(void)124 static int initr_reloc_global_data(void)
125 {
126 #ifdef __ARM__
127 monitor_flash_len = _end - __image_copy_start;
128 #elif defined(CONFIG_RISCV)
129 monitor_flash_len = (ulong)_end - (ulong)_start;
130 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
131 monitor_flash_len = (ulong)__init_end - gd->relocaddr;
132 #endif
133 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
134 /*
135 * The gd->cpu pointer is set to an address in flash before relocation.
136 * We need to update it to point to the same CPU entry in RAM.
137 * TODO: why not just add gd->reloc_ofs?
138 */
139 gd->arch.cpu += gd->relocaddr - CONFIG_SYS_MONITOR_BASE;
140
141 /*
142 * If we didn't know the cpu mask & # cores, we can save them of
143 * now rather than 'computing' them constantly
144 */
145 fixup_cpu();
146 #endif
147 #ifdef CONFIG_ENV_RELOC_GD_ENV_ADDR
148 /*
149 * Relocate the early env_addr pointer unless we know it is not inside
150 * the binary. Some systems need this and for the rest, it doesn't hurt.
151 */
152 gd->env_addr += gd->reloc_off;
153 #endif
154
155 /*
156 * For CONFIG_OF_EMBED case the FDT is embedded into ELF, available by
157 * __dtb_dt_begin. After U-Boot ELF self-relocation to RAM top address
158 * it is worth to update fdt_blob in global_data
159 */
160 if (IS_ENABLED(CONFIG_OF_EMBED))
161 fdtdec_setup_embed();
162
163 #ifdef CONFIG_EFI_LOADER
164 /*
165 * On the ARM architecture gd is mapped to a fixed register (r9 or x18).
166 * As this register may be overwritten by an EFI payload we save it here
167 * and restore it on every callback entered.
168 */
169 efi_save_gd();
170
171 if (!(gd->flags & GD_FLG_SKIP_RELOC))
172 efi_runtime_relocate(gd->relocaddr, NULL);
173
174 #endif
175 /*
176 * We are done with all relocations change the permissions of the binary
177 * NOTE: __start_rodata etc are defined in arm64 linker scripts and
178 * sections.h. If you want to add support for your platform you need to
179 * add the symbols on your linker script, otherwise they will point to
180 * random addresses.
181 *
182 */
183 if (IS_ENABLED(CONFIG_MMU_PGPROT)) {
184 pgprot_set_attrs((phys_addr_t)(uintptr_t)(__start_rodata),
185 (size_t)(uintptr_t)(__end_rodata - __start_rodata),
186 MMU_ATTR_RO);
187 pgprot_set_attrs((phys_addr_t)(uintptr_t)(__start_data),
188 (size_t)(uintptr_t)(__end_data - __start_data),
189 MMU_ATTR_RW);
190 pgprot_set_attrs((phys_addr_t)(uintptr_t)(__text_start),
191 (size_t)(uintptr_t)(__text_end - __text_start),
192 MMU_ATTR_RX);
193 }
194
195 return 0;
196 }
197
arch_initr_trap(void)198 __weak int arch_initr_trap(void)
199 {
200 return 0;
201 }
202
203 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
initr_unlock_ram_in_cache(void)204 static int initr_unlock_ram_in_cache(void)
205 {
206 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
207 return 0;
208 }
209 #endif
210
initr_barrier(void)211 static int initr_barrier(void)
212 {
213 #ifdef CONFIG_PPC
214 /* TODO: Can we not use dmb() macros for this? */
215 asm("sync ; isync");
216 #endif
217 return 0;
218 }
219
initr_malloc(void)220 static int initr_malloc(void)
221 {
222 ulong start;
223
224 #if CONFIG_IS_ENABLED(SYS_MALLOC_F)
225 debug("Pre-reloc malloc() used %#x bytes (%d KB)\n", gd->malloc_ptr,
226 gd->malloc_ptr / 1024);
227 #endif
228 /* The malloc area is immediately below the monitor copy in DRAM */
229 /*
230 * This value MUST match the value of gd->start_addr_sp in board_f.c:
231 * reserve_noncached().
232 */
233 start = gd->relocaddr - TOTAL_MALLOC_LEN;
234 gd_set_malloc_start(start);
235 mem_malloc_init(start, TOTAL_MALLOC_LEN);
236 return 0;
237 }
238
initr_of_live(void)239 static int initr_of_live(void)
240 {
241 if (CONFIG_IS_ENABLED(OF_LIVE)) {
242 int ret;
243
244 bootstage_start(BOOTSTAGE_ID_ACCUM_OF_LIVE, "of_live");
245 ret = of_live_build(gd->fdt_blob,
246 (struct device_node **)gd_of_root_ptr());
247 bootstage_accum(BOOTSTAGE_ID_ACCUM_OF_LIVE);
248 if (ret)
249 return ret;
250 }
251
252 return 0;
253 }
254
255 #ifdef CONFIG_DM
initr_dm(void)256 static int initr_dm(void)
257 {
258 int ret;
259
260 oftree_reset();
261
262 /* Drop the pre-reloc driver model and start a new one */
263 gd->dm_root = NULL;
264 #ifdef CONFIG_TIMER
265 gd->timer = NULL;
266 #endif
267 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r");
268 ret = dm_init_and_scan(false);
269 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R);
270 if (ret)
271 return ret;
272
273 return dm_autoprobe();
274 }
275 #endif
276
initr_dm_devices(void)277 static int initr_dm_devices(void)
278 {
279 int ret;
280
281 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
282 ret = dm_timer_init();
283 if (ret)
284 return ret;
285 }
286
287 if (IS_ENABLED(CONFIG_MULTIPLEXER)) {
288 /*
289 * Initialize the multiplexer controls to their default state.
290 * This must be done early as other drivers may unknowingly
291 * rely on it.
292 */
293 ret = dm_mux_init();
294 if (ret)
295 return ret;
296 }
297
298 return 0;
299 }
300
initr_bootstage(void)301 static int initr_bootstage(void)
302 {
303 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r");
304
305 return 0;
306 }
307
power_init_board(void)308 __weak int power_init_board(void)
309 {
310 return 0;
311 }
312
initr_announce(void)313 static int initr_announce(void)
314 {
315 debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr);
316 return 0;
317 }
318
initr_binman(void)319 static int __maybe_unused initr_binman(void)
320 {
321 int ret;
322
323 ret = binman_init();
324 if (ret)
325 printf("binman_init failed:%d\n", ret);
326
327 return ret;
328 }
329
330 #if defined(CONFIG_MTD_NOR_FLASH)
is_flash_available(void)331 __weak int is_flash_available(void)
332 {
333 return 1;
334 }
335
initr_flash(void)336 static int initr_flash(void)
337 {
338 ulong flash_size = 0;
339 struct bd_info *bd = gd->bd;
340
341 if (!is_flash_available())
342 return 0;
343
344 puts("Flash: ");
345
346 if (board_flash_wp_on())
347 printf("Uninitialized - Write Protect On\n");
348 else
349 flash_size = flash_init();
350
351 print_size(flash_size, "");
352 #ifdef CONFIG_SYS_FLASH_CHECKSUM
353 /*
354 * Compute and print flash CRC if flashchecksum is set to 'y'
355 *
356 * NOTE: Maybe we should add some schedule()? XXX
357 */
358 if (env_get_yesno("flashchecksum") == 1) {
359 const uchar *flash_base = (const uchar *)CFG_SYS_FLASH_BASE;
360
361 printf(" CRC: %08X", crc32(0,
362 flash_base,
363 flash_size));
364 }
365 #endif /* CONFIG_SYS_FLASH_CHECKSUM */
366 putc('\n');
367
368 /* update start of FLASH memory */
369 #ifdef CFG_SYS_FLASH_BASE
370 bd->bi_flashstart = CFG_SYS_FLASH_BASE;
371 #endif
372 /* size of FLASH memory (final value) */
373 bd->bi_flashsize = flash_size;
374
375 #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
376 /* Make a update of the Memctrl. */
377 update_flash_size(flash_size);
378 #endif
379
380 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
381 /* flash mapped at end of memory map */
382 bd->bi_flashoffset = CONFIG_TEXT_BASE + flash_size;
383 #elif CONFIG_SYS_MONITOR_BASE == CFG_SYS_FLASH_BASE
384 bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
385 #endif
386 return 0;
387 }
388 #endif
389
390 #ifdef CONFIG_CMD_NAND
391 /* go init the NAND */
initr_nand(void)392 static int initr_nand(void)
393 {
394 puts("NAND: ");
395 nand_init();
396 printf("%lu MiB\n", nand_size() / 1024);
397 return 0;
398 }
399 #endif
400
401 #if defined(CONFIG_CMD_ONENAND)
402 /* go init the NAND */
initr_onenand(void)403 static int initr_onenand(void)
404 {
405 puts("NAND: ");
406 onenand_init();
407 return 0;
408 }
409 #endif
410
411 #ifdef CONFIG_MMC
initr_mmc(void)412 static int initr_mmc(void)
413 {
414 puts("MMC: ");
415 mmc_initialize(gd->bd);
416 return 0;
417 }
418 #endif
419
420 #ifdef CONFIG_PVBLOCK
initr_pvblock(void)421 static int initr_pvblock(void)
422 {
423 puts("PVBLOCK: ");
424 pvblock_init();
425 return 0;
426 }
427 #endif
428
429 /*
430 * Tell if it's OK to load the environment early in boot.
431 *
432 * If CONFIG_OF_CONTROL is defined, we'll check with the FDT to see
433 * if this is OK (defaulting to saying it's OK).
434 *
435 * NOTE: Loading the environment early can be a bad idea if security is
436 * important, since no verification is done on the environment.
437 *
438 * Return: 0 if environment should not be loaded, !=0 if it is ok to load
439 */
should_load_env(void)440 static int should_load_env(void)
441 {
442 if (IS_ENABLED(CONFIG_OF_CONTROL))
443 return ofnode_conf_read_int("load-environment", 1);
444
445 return 1;
446 }
447
initr_env(void)448 static int initr_env(void)
449 {
450 /* initialize environment */
451 if (should_load_env())
452 env_relocate();
453 else
454 env_set_default(NULL, 0);
455
456 env_import_fdt();
457
458 if (IS_ENABLED(CONFIG_OF_CONTROL))
459 env_set_hex("fdtcontroladdr",
460 (unsigned long)map_to_sysmem(gd->fdt_blob));
461
462 #if (IS_ENABLED(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) || \
463 IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR))
464 save_prev_bl_data();
465 #endif
466
467 /* Initialize from environment */
468 image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr);
469
470 return 0;
471 }
472
473 #ifdef CONFIG_SYS_MALLOC_BOOTPARAMS
initr_malloc_bootparams(void)474 static int initr_malloc_bootparams(void)
475 {
476 gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN);
477 if (!gd->bd->bi_boot_params) {
478 puts("WARNING: Cannot allocate space for boot parameters\n");
479 return -ENOMEM;
480 }
481 return 0;
482 }
483 #endif
484
initr_status_led(void)485 static int initr_status_led(void)
486 {
487 status_led_init();
488
489 return 0;
490 }
491
initr_boot_led_blink(void)492 static int initr_boot_led_blink(void)
493 {
494 status_led_boot_blink();
495
496 led_boot_blink();
497
498 return 0;
499 }
500
initr_boot_led_on(void)501 static int initr_boot_led_on(void)
502 {
503 led_boot_on();
504
505 return 0;
506 }
507
508 #if CONFIG_IS_ENABLED(NET) || CONFIG_IS_ENABLED(NET_LWIP)
initr_net(void)509 static int initr_net(void)
510 {
511 puts("Net: ");
512 eth_initialize();
513 #if defined(CONFIG_RESET_PHY_R)
514 debug("Reset Ethernet PHY\n");
515 reset_phy();
516 #endif
517 return 0;
518 }
519 #endif
520
521 #ifdef CONFIG_POST
initr_post(void)522 static int initr_post(void)
523 {
524 post_run(NULL, POST_RAM | post_bootmode_get(0));
525 return 0;
526 }
527 #endif
528
529 #if defined(CFG_PRAM)
530 /*
531 * Export available size of memory for Linux, taking into account the
532 * protected RAM at top of memory
533 */
initr_mem(void)534 int initr_mem(void)
535 {
536 ulong pram = 0;
537 char memsz[32];
538
539 pram = env_get_ulong("pram", 10, CFG_PRAM);
540 sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram));
541 env_set("mem", memsz);
542
543 return 0;
544 }
545 #endif
546
initr_lmb(void)547 static int initr_lmb(void)
548 {
549 if (CONFIG_IS_ENABLED(LMB))
550 return lmb_init();
551 else
552 return 0;
553 }
554
dm_announce(void)555 static int dm_announce(void)
556 {
557 int device_count;
558 int uclass_count;
559
560 if (IS_ENABLED(CONFIG_DM)) {
561 dm_get_stats(&device_count, &uclass_count);
562 printf("Core: %d devices, %d uclasses", device_count,
563 uclass_count);
564 if (CONFIG_IS_ENABLED(OF_REAL))
565 printf(", devicetree: %s", fdtdec_get_srcname());
566 if (CONFIG_IS_ENABLED(UPL))
567 printf(", universal payload active");
568 printf("\n");
569 if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) &&
570 (gd->fdt_src == FDTSRC_SEPARATE ||
571 gd->fdt_src == FDTSRC_EMBED)) {
572 printf("Warning: Unexpected devicetree source (not from a prior stage)");
573 printf("Warning: U-Boot may not function properly\n");
574 }
575 if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE) &&
576 (gd->flags & GD_FLG_OF_TAG_MIGRATE))
577 /*
578 * U-Boot will silently fail to work after 2023.07 if
579 * there are old tags present
580 */
581 printf("Warning: Device tree includes old 'u-boot,dm-' tags: please fix by 2023.07!\n");
582 }
583
584 return 0;
585 }
586
run_main_loop(void)587 static int run_main_loop(void)
588 {
589 #ifdef CONFIG_SANDBOX
590 sandbox_main_loop_init();
591 #endif
592
593 event_notify_null(EVT_MAIN_LOOP);
594
595 /* main_loop() can return to retry autoboot, if so just run it again */
596 for (;;)
597 main_loop();
598 return 0;
599 }
600
601 /*
602 * Over time we hope to remove most of the driver-related init and do it
603 * if/when the driver is later used.
604 *
605 * TODO: perhaps reset the watchdog in the initcall function after each call?
606 */
607
initcall_run_r(void)608 static void initcall_run_r(void)
609 {
610 /*
611 * Please do not add logic to this function (variables, if (), etc.).
612 * For simplicity it should remain an ordered list of function calls.
613 */
614 INITCALL(initr_trace);
615 INITCALL(initr_reloc);
616 INITCALL(event_init);
617 /* TODO: could x86/PPC have this also perhaps? */
618 #if CONFIG_IS_ENABLED(ARM) || CONFIG_IS_ENABLED(RISCV)
619 INITCALL(initr_caches);
620 /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
621 * A temporary mapping of IFC high region is since removed,
622 * so environmental variables in NOR flash is not available
623 * until board_init() is called below to remap IFC to high
624 * region.
625 */
626 #endif
627 INITCALL(initr_reloc_global_data);
628 #if CONFIG_IS_ENABLED(SYS_INIT_RAM_LOCK) && CONFIG_IS_ENABLED(E500)
629 INITCALL(initr_unlock_ram_in_cache);
630 #endif
631 INITCALL(initr_barrier);
632 INITCALL(initr_malloc);
633 INITCALL(log_init);
634 INITCALL(initr_bootstage); /* Needs malloc() but has its own timer */
635 #if CONFIG_IS_ENABLED(CONSOLE_RECORD)
636 INITCALL(console_record_init);
637 #endif
638 #if CONFIG_IS_ENABLED(SYS_HAS_NONCACHED_MEMORY)
639 INITCALL(noncached_init);
640 #endif
641 INITCALL(initr_of_live);
642 #if CONFIG_IS_ENABLED(DM)
643 INITCALL(initr_dm);
644 #endif
645 #if CONFIG_IS_ENABLED(ADDR_MAP)
646 INITCALL(init_addr_map);
647 #endif
648 #if CONFIG_IS_ENABLED(BOARD_INIT)
649 INITCALL(board_init); /* Setup chipselects */
650 #endif
651 /*
652 * TODO: printing of the clock inforamtion of the board is now
653 * implemented as part of bdinfo command. Currently only support for
654 * davinci SOC's is added. Remove this check once all the board
655 * implement this.
656 */
657 #if CONFIG_IS_ENABLED(CLOCKS)
658 INITCALL(set_cpu_clk_info);
659 #endif
660 INITCALL(initr_lmb);
661 #if CONFIG_IS_ENABLED(EFI_LOADER)
662 INITCALL(efi_memory_init);
663 #endif
664 #if CONFIG_IS_ENABLED(BINMAN_FDT)
665 INITCALL(initr_binman);
666 #endif
667 #if CONFIG_IS_ENABLED(FSP_VERSION2)
668 INITCALL(arch_fsp_init_r);
669 #endif
670 INITCALL(initr_dm_devices);
671 INITCALL(stdio_init_tables);
672 INITCALL(serial_initialize);
673 INITCALL(initr_announce);
674 INITCALL(dm_announce);
675 #if CONFIG_IS_ENABLED(WDT)
676 INITCALL(initr_watchdog);
677 #endif
678 WATCHDOG_RESET();
679 INITCALL(arch_initr_trap);
680 #if CONFIG_IS_ENABLED(BOARD_EARLY_INIT_R)
681 INITCALL(board_early_init_r);
682 #endif
683 WATCHDOG_RESET();
684 #if CONFIG_IS_ENABLED(POST)
685 INITCALL(post_output_backlog);
686 #endif
687 WATCHDOG_RESET();
688 #if CONFIG_IS_ENABLED(PCI_INIT_R) && CONFIG_IS_ENABLED(SYS_EARLY_PCI_INIT)
689 /*
690 * Do early PCI configuration _before_ the flash gets initialised,
691 * because PCU resources are crucial for flash access on some boards.
692 */
693 INITCALL(pci_init);
694 #endif
695 #if CONFIG_IS_ENABLED(ARCH_EARLY_INIT_R)
696 INITCALL(arch_early_init_r);
697 #endif
698 INITCALL(power_init_board);
699 #if CONFIG_IS_ENABLED(MTD_NOR_FLASH)
700 INITCALL(initr_flash);
701 #endif
702 WATCHDOG_RESET();
703 #if CONFIG_IS_ENABLED(PPC) || CONFIG_IS_ENABLED(M68K) || CONFIG_IS_ENABLED(X86)
704 /* initialize higher level parts of CPU like time base and timers */
705 INITCALL(cpu_init_r);
706 #endif
707 #if CONFIG_IS_ENABLED(EFI_LOADER)
708 INITCALL(efi_init_early);
709 #endif
710 #if CONFIG_IS_ENABLED(CMD_NAND)
711 INITCALL(initr_nand);
712 #endif
713 #if CONFIG_IS_ENABLED(CMD_ONENAND)
714 INITCALL(initr_onenand);
715 #endif
716 #if CONFIG_IS_ENABLED(MMC)
717 INITCALL(initr_mmc);
718 #endif
719 #if CONFIG_IS_ENABLED(XEN)
720 INITCALL(xen_init);
721 #endif
722 #if CONFIG_IS_ENABLED(PVBLOCK)
723 INITCALL(initr_pvblock);
724 #endif
725 INITCALL(initr_env);
726 #if CONFIG_IS_ENABLED(SYS_MALLOC_BOOTPARAMS)
727 INITCALL(initr_malloc_bootparams);
728 #endif
729 WATCHDOG_RESET();
730 INITCALL(cpu_secondary_init_r);
731 #if CONFIG_IS_ENABLED(ID_EEPROM)
732 INITCALL(mac_read_from_eeprom);
733 #endif
734 INITCALL_EVT(EVT_SETTINGS_R);
735 WATCHDOG_RESET();
736 #if CONFIG_IS_ENABLED(PCI_INIT_R) && !CONFIG_IS_ENABLED(SYS_EARLY_PCI_INIT)
737 /*
738 * Do pci configuration
739 */
740 INITCALL(pci_init);
741 #endif
742 INITCALL(stdio_add_devices);
743 INITCALL(jumptable_init);
744 #if CONFIG_IS_ENABLED(API)
745 INITCALL(api_init);
746 #endif
747 INITCALL(console_init_r); /* fully init console as a device */
748 #if CONFIG_IS_ENABLED(DISPLAY_BOARDINFO_LATE)
749 INITCALL(console_announce_r);
750 INITCALL(show_board_info);
751 #endif
752 /* miscellaneous arch-dependent init */
753 #if CONFIG_IS_ENABLED(ARCH_MISC_INIT)
754 INITCALL(arch_misc_init);
755 #endif
756 /* miscellaneous platform-dependent init */
757 #if CONFIG_IS_ENABLED(MISC_INIT_R)
758 INITCALL(misc_init_r);
759 #endif
760 WATCHDOG_RESET();
761 #if CONFIG_IS_ENABLED(CMD_KGDB)
762 INITCALL(kgdb_init);
763 #endif
764 INITCALL(interrupt_init);
765 #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
766 INITCALL(timer_init); /* initialize timer */
767 #endif
768 INITCALL(initr_status_led);
769 INITCALL(initr_boot_led_blink);
770 /* PPC has a udelay(20) here dating from 2002. Why? */
771 #if CONFIG_IS_ENABLED(BOARD_LATE_INIT)
772 INITCALL(board_late_init);
773 #endif
774 #if CONFIG_IS_ENABLED(PCI_ENDPOINT)
775 INITCALL(pci_ep_init);
776 #endif
777 #if CONFIG_IS_ENABLED(NET) || CONFIG_IS_ENABLED(NET_LWIP)
778 WATCHDOG_RESET();
779 INITCALL(initr_net);
780 #endif
781 #if CONFIG_IS_ENABLED(POST)
782 INITCALL(initr_post);
783 #endif
784 WATCHDOG_RESET();
785 INITCALL_EVT(EVT_LAST_STAGE_INIT);
786 #if defined(CFG_PRAM)
787 INITCALL(initr_mem);
788 #endif
789 INITCALL(initr_boot_led_on);
790 INITCALL(run_main_loop);
791 }
792
board_init_r(gd_t * new_gd,ulong dest_addr)793 void board_init_r(gd_t *new_gd, ulong dest_addr)
794 {
795 /*
796 * The pre-relocation drivers may be using memory that has now gone
797 * away. Mark serial as unavailable - this will fall back to the debug
798 * UART if available.
799 *
800 * Do the same with log drivers since the memory may not be available.
801 */
802 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
803
804 /*
805 * Set up the new global data pointer. So far only x86 does this
806 * here.
807 * TODO(sjg@chromium.org): Consider doing this for all archs, or
808 * dropping the new_gd parameter.
809 */
810 if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP))
811 arch_setup_gd(new_gd);
812
813 #if defined(CONFIG_RISCV)
814 set_gd(new_gd);
815 #elif !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
816 gd = new_gd;
817 #endif
818 gd->flags &= ~GD_FLG_LOG_READY;
819
820 initcall_run_r();
821
822 /* NOTREACHED - run_main_loop() does not return */
823 hang();
824 }
825