1 /****************************************************************************
2 *
3 * BIOS emulator and interface
4 * to Realmode X86 Emulator Library
5 *
6 * Copyright (C) 2007 Freescale Semiconductor, Inc.
7 * Jason Jin <Jason.jin@freescale.com>
8 *
9 * Copyright (C) 1996-1999 SciTech Software, Inc.
10 *
11 * ========================================================================
12 *
13 * Permission to use, copy, modify, distribute, and sell this software and
14 * its documentation for any purpose is hereby granted without fee,
15 * provided that the above copyright notice appear in all copies and that
16 * both that copyright notice and this permission notice appear in
17 * supporting documentation, and that the name of the authors not be used
18 * in advertising or publicity pertaining to distribution of the software
19 * without specific, written prior permission. The authors makes no
20 * representations about the suitability of this software for any purpose.
21 * It is provided "as is" without express or implied warranty.
22 *
23 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
24 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
25 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
26 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
27 * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
28 * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
29 * PERFORMANCE OF THIS SOFTWARE.
30 *
31 * ========================================================================
32 *
33 * Language: ANSI C
34 * Environment: Any
35 * Developer: Kendall Bennett
36 *
37 * Description: Module implementing the BIOS specific functions.
38 *
39 * Jason ported this file to u-boot to run the ATI video card
40 * video BIOS.
41 *
42 ****************************************************************************/
43
44 #define __io
45 #include <asm/io.h>
46 #include "biosemui.h"
47
48 /*----------------------------- Implementation ----------------------------*/
49
50 /****************************************************************************
51 PARAMETERS:
52 intno - Interrupt number being serviced
53
54 REMARKS:
55 Handler for undefined interrupts.
56 ****************************************************************************/
undefined_intr(int intno)57 static void X86API undefined_intr(int intno)
58 {
59 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
60 DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
61 } else
62 X86EMU_prepareForInt(intno);
63 }
64
65 /****************************************************************************
66 PARAMETERS:
67 intno - Interrupt number being serviced
68
69 REMARKS:
70 This function handles the default system BIOS Int 10h (the default is stored
71 in the Int 42h vector by the system BIOS at bootup). We only need to handle
72 a small number of special functions used by the BIOS during POST time.
73 ****************************************************************************/
int42(int intno)74 static void X86API int42(int intno)
75 {
76 if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
77 if (M.x86.R_AL == 0) {
78 /* Enable CPU accesses to video memory */
79 PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
80 return;
81 } else if (M.x86.R_AL == 1) {
82 /* Disable CPU accesses to video memory */
83 PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
84 return;
85 }
86 #ifdef CONFIG_X86EMU_DEBUG
87 else {
88 printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
89 M.x86.R_AL);
90 }
91 #endif
92 }
93 #ifdef CONFIG_X86EMU_DEBUG
94 else {
95 printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
96 M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
97 }
98 #endif
99 }
100
101 /****************************************************************************
102 PARAMETERS:
103 intno - Interrupt number being serviced
104
105 REMARKS:
106 This function handles the default system BIOS Int 10h. If the POST code
107 has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
108 by simply calling the int42 interrupt handler above. Very early in the
109 BIOS POST process, the vector gets replaced and we simply let the real
110 mode interrupt handler process the interrupt.
111 ****************************************************************************/
int10(int intno)112 static void X86API int10(int intno)
113 {
114 if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
115 int42(intno);
116 else
117 X86EMU_prepareForInt(intno);
118 }
119
120 /* Result codes returned by the PCI BIOS */
121
122 #define SUCCESSFUL 0x00
123 #define FUNC_NOT_SUPPORT 0x81
124 #define BAD_VENDOR_ID 0x83
125 #define DEVICE_NOT_FOUND 0x86
126 #define BAD_REGISTER_NUMBER 0x87
127 #define SET_FAILED 0x88
128 #define BUFFER_TOO_SMALL 0x89
129
130 /****************************************************************************
131 PARAMETERS:
132 intno - Interrupt number being serviced
133
134 REMARKS:
135 This function handles the default Int 1Ah interrupt handler for the real
136 mode code, which provides support for the PCI BIOS functions. Since we only
137 want to allow the real mode BIOS code *only* see the PCI config space for
138 its own device, we only return information for the specific PCI config
139 space that we have passed in to the init function. This solves problems
140 when using the BIOS to warm boot a secondary adapter when there is an
141 identical adapter before it on the bus (some BIOS'es get confused in this
142 case).
143 ****************************************************************************/
int1A(int unused)144 static void X86API int1A(int unused)
145 {
146 u16 pciSlot;
147
148 #ifdef __KERNEL__
149 u8 interface, subclass, baseclass;
150
151 /* Initialise the PCI slot number */
152 pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
153 ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
154 #else
155 /* Fail if no PCI device information has been registered */
156 if (!_BE_env.vgaInfo.pciInfo)
157 return;
158
159 pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
160 #endif
161 switch (M.x86.R_AX) {
162 case 0xB101: /* PCI bios present? */
163 M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
164 M.x86.R_EDX = 0x20494350; /* " ICP" */
165 M.x86.R_BX = 0x0210; /* Version 2.10 */
166 M.x86.R_CL = 0; /* Max bus number in system */
167 CLEAR_FLAG(F_CF);
168 break;
169 case 0xB102: /* Find PCI device */
170 M.x86.R_AH = DEVICE_NOT_FOUND;
171 #ifdef __KERNEL__
172 if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
173 M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
174 #else
175 if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
176 M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
177 M.x86.R_SI == 0) {
178 #endif
179 M.x86.R_AH = SUCCESSFUL;
180 M.x86.R_BX = pciSlot;
181 }
182 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
183 break;
184 case 0xB103: /* Find PCI class code */
185 M.x86.R_AH = DEVICE_NOT_FOUND;
186 #ifdef __KERNEL__
187 dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
188 &interface);
189 dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
190 &subclass);
191 dm_pci_read_config8(_BE_env.vgaInfo.pcidev,
192 PCI_CLASS_DEVICE + 1, &baseclass);
193 if (M.x86.R_CL == interface && M.x86.R_CH == subclass
194 && (u8) (M.x86.R_ECX >> 16) == baseclass) {
195 #else
196 if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
197 M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
198 (u8) (M.x86.R_ECX >> 16) ==
199 _BE_env.vgaInfo.pciInfo->BaseClass) {
200 #endif
201 M.x86.R_AH = SUCCESSFUL;
202 M.x86.R_BX = pciSlot;
203 }
204 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
205 break;
206 case 0xB108: /* Read configuration byte */
207 M.x86.R_AH = BAD_REGISTER_NUMBER;
208 if (M.x86.R_BX == pciSlot) {
209 M.x86.R_AH = SUCCESSFUL;
210 #ifdef __KERNEL__
211 dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
212 &M.x86.R_CL);
213 #else
214 M.x86.R_CL =
215 (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
216 _BE_env.vgaInfo.pciInfo);
217 #endif
218 }
219 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
220 break;
221 case 0xB109: /* Read configuration word */
222 M.x86.R_AH = BAD_REGISTER_NUMBER;
223 if (M.x86.R_BX == pciSlot) {
224 M.x86.R_AH = SUCCESSFUL;
225 #ifdef __KERNEL__
226 dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
227 &M.x86.R_CX);
228 #else
229 M.x86.R_CX =
230 (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
231 _BE_env.vgaInfo.pciInfo);
232 #endif
233 }
234 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
235 break;
236 case 0xB10A: /* Read configuration dword */
237 M.x86.R_AH = BAD_REGISTER_NUMBER;
238 if (M.x86.R_BX == pciSlot) {
239 M.x86.R_AH = SUCCESSFUL;
240 #ifdef __KERNEL__
241 dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
242 M.x86.R_DI, &M.x86.R_ECX);
243 #else
244 M.x86.R_ECX =
245 (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
246 _BE_env.vgaInfo.pciInfo);
247 #endif
248 }
249 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
250 break;
251 case 0xB10B: /* Write configuration byte */
252 M.x86.R_AH = BAD_REGISTER_NUMBER;
253 if (M.x86.R_BX == pciSlot) {
254 M.x86.R_AH = SUCCESSFUL;
255 #ifdef __KERNEL__
256 dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
257 M.x86.R_DI, M.x86.R_CL);
258 #else
259 PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
260 _BE_env.vgaInfo.pciInfo);
261 #endif
262 }
263 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
264 break;
265 case 0xB10C: /* Write configuration word */
266 M.x86.R_AH = BAD_REGISTER_NUMBER;
267 if (M.x86.R_BX == pciSlot) {
268 M.x86.R_AH = SUCCESSFUL;
269 #ifdef __KERNEL__
270 dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
271 M.x86.R_DI, M.x86.R_CX);
272 #else
273 PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
274 _BE_env.vgaInfo.pciInfo);
275 #endif
276 }
277 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
278 break;
279 case 0xB10D: /* Write configuration dword */
280 M.x86.R_AH = BAD_REGISTER_NUMBER;
281 if (M.x86.R_BX == pciSlot) {
282 M.x86.R_AH = SUCCESSFUL;
283 #ifdef __KERNEL__
284 dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
285 M.x86.R_DI, M.x86.R_ECX);
286 #else
287 PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
288 _BE_env.vgaInfo.pciInfo);
289 #endif
290 }
291 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
292 break;
293 default:
294 printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
295 M.x86.R_AX);
296 }
297 }
298
299 /****************************************************************************
300 REMARKS:
301 This function initialises the BIOS emulation functions for the specific
302 PCI display device. We insulate the real mode BIOS from any other devices
303 on the bus, so that it will work correctly thinking that it is the only
304 device present on the bus (ie: avoiding any adapters present in from of
305 the device we are trying to control).
306 ****************************************************************************/
307 #define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
308
309 void _BE_bios_init(u32 * intrTab)
310 {
311 int i;
312 X86EMU_intrFuncs bios_intr_tab[256];
313
314 for (i = 0; i < 256; ++i) {
315 intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
316 bios_intr_tab[i] = undefined_intr;
317 }
318 bios_intr_tab[0x10] = int10;
319 bios_intr_tab[0x1A] = int1A;
320 bios_intr_tab[0x42] = int42;
321 bios_intr_tab[0x6D] = int10;
322 X86EMU_setupIntrFuncs(bios_intr_tab);
323 }
324