1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2019 Western Digital Corporation or its affiliates.
4 *
5 * Author: Anup Patel <anup.patel@wdc.com>
6 */
7
8 #define LOG_CATEGORY UCLASS_CLK
9
10 #include <clk-uclass.h>
11 #include <div64.h>
12 #include <dm.h>
13 #include <log.h>
14 #include <linux/err.h>
15
16 struct clk_fixed_factor {
17 struct clk parent;
18 unsigned int div;
19 unsigned int mult;
20 };
21
22 #define to_clk_fixed_factor(dev) \
23 ((struct clk_fixed_factor *)dev_get_plat(dev))
24
clk_fixed_factor_get_rate(struct clk * clk)25 static ulong clk_fixed_factor_get_rate(struct clk *clk)
26 {
27 uint64_t rate;
28 struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
29
30 rate = clk_get_rate(&ff->parent);
31 if (IS_ERR_VALUE(rate))
32 return rate;
33
34 do_div(rate, ff->div);
35
36 return rate * ff->mult;
37 }
38
39 const struct clk_ops clk_fixed_factor_ops = {
40 .get_rate = clk_fixed_factor_get_rate,
41 };
42
clk_fixed_factor_of_to_plat(struct udevice * dev)43 static int clk_fixed_factor_of_to_plat(struct udevice *dev)
44 {
45 if (CONFIG_IS_ENABLED(OF_REAL)) {
46 int err;
47 struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);
48
49 err = clk_get_by_index(dev, 0, &ff->parent);
50 if (err)
51 return err;
52
53 ff->div = dev_read_u32_default(dev, "clock-div", 1);
54 ff->mult = dev_read_u32_default(dev, "clock-mult", 1);
55 }
56
57 return 0;
58 }
59
60 static const struct udevice_id clk_fixed_factor_match[] = {
61 {
62 .compatible = "fixed-factor-clock",
63 },
64 { /* sentinel */ }
65 };
66
67 U_BOOT_DRIVER(clk_fixed_factor) = {
68 .name = "fixed_factor_clock",
69 .id = UCLASS_CLK,
70 .of_match = clk_fixed_factor_match,
71 .of_to_plat = clk_fixed_factor_of_to_plat,
72 .plat_auto = sizeof(struct clk_fixed_factor),
73 .ops = &clk_fixed_factor_ops,
74 };
75