1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2022, Ovidiu Panait <ovpanait@gmail.com>
4  */
5 #include <cpu.h>
6 #include <dm.h>
7 #include <asm/cpuinfo.h>
8 #include <asm/global_data.h>
9 #include <asm/pvr.h>
10 
11 DECLARE_GLOBAL_DATA_PTR;
12 
13 #define update_cpuinfo_pvr(pvr, ci, name)					\
14 {										\
15 	u32 tmp = PVR_##name(pvr);						\
16 	if (ci != tmp)								\
17 		printf("PVR value for " #name " does not match static data!\n");\
18 	ci = tmp;								\
19 }
20 
microblaze_cpu_probe_all(void)21 static int microblaze_cpu_probe_all(void)
22 {
23 	int ret;
24 
25 	ret = cpu_probe_all();
26 	if (ret)
27 		return log_msg_ret("Microblaze cpus probe failed\n", ret);
28 
29 	return 0;
30 }
31 EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all);
32 
microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo * ci)33 static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci)
34 {
35 	u32 pvr[PVR_FULL_COUNT];
36 
37 	microblaze_get_all_pvrs(pvr);
38 
39 	update_cpuinfo_pvr(pvr, ci->icache_size, ICACHE_BYTE_SIZE);
40 	update_cpuinfo_pvr(pvr, ci->icache_line_length, ICACHE_LINE_LEN);
41 
42 	update_cpuinfo_pvr(pvr, ci->dcache_size, DCACHE_BYTE_SIZE);
43 	update_cpuinfo_pvr(pvr, ci->dcache_line_length, DCACHE_LINE_LEN);
44 
45 	update_cpuinfo_pvr(pvr, ci->use_mmu, USE_MMU);
46 	update_cpuinfo_pvr(pvr, ci->ver_code, VERSION);
47 	update_cpuinfo_pvr(pvr, ci->fpga_code, TARGET_FAMILY);
48 }
49 
microblaze_set_cpuinfo_static(struct udevice * dev,struct microblaze_cpuinfo * ci)50 static void microblaze_set_cpuinfo_static(struct udevice *dev,
51 					  struct microblaze_cpuinfo *ci)
52 {
53 	const char *hw_ver = CONFIG_XILINX_MICROBLAZE0_HW_VER;
54 	const char *fpga_family = CONFIG_XILINX_MICROBLAZE0_FPGA_FAMILY;
55 
56 	ci->icache_size = dev_read_u32_default(dev, "i-cache-size", 0);
57 	ci->icache_line_length = dev_read_u32_default(dev,
58 						"i-cache-line-size", 0);
59 
60 	ci->dcache_size = dev_read_u32_default(dev, "d-cache-size", 0);
61 	ci->dcache_line_length = dev_read_u32_default(dev,
62 						"d-cache-line-size", 0);
63 
64 	ci->cpu_freq = dev_read_u32_default(dev, "clock-frequency", 0);
65 	ci->addr_size = dev_read_u32_default(dev, "xlnx,addr-size", 32);
66 	ci->use_mmu = dev_read_u32_default(dev, "xlnx,use-mmu", 0);
67 
68 	ci->ver_code = microblaze_lookup_cpu_version_code(hw_ver);
69 	ci->fpga_code = microblaze_lookup_fpga_family_code(fpga_family);
70 }
71 
microblaze_cpu_probe(struct udevice * dev)72 static int microblaze_cpu_probe(struct udevice *dev)
73 {
74 	microblaze_set_cpuinfo_static(dev, gd_cpuinfo());
75 
76 	if (microblaze_cpu_has_pvr_full())
77 		microblaze_set_cpuinfo_pvr(gd_cpuinfo());
78 	else
79 		debug("No PVR support. Using only static CPU info.\n");
80 
81 	return 0;
82 }
83 
microblaze_cpu_get_desc(const struct udevice * dev,char * buf,int size)84 static int microblaze_cpu_get_desc(const struct udevice *dev, char *buf,
85 				   int size)
86 {
87 	struct microblaze_cpuinfo *ci = gd_cpuinfo();
88 	const char *cpu_ver, *fpga_family;
89 	u32 cpu_freq_mhz;
90 	int ret;
91 
92 	cpu_freq_mhz = ci->cpu_freq / 1000000;
93 	cpu_ver = microblaze_lookup_cpu_version_string(ci->ver_code);
94 	fpga_family = microblaze_lookup_fpga_family_string(ci->fpga_code);
95 
96 	ret = snprintf(buf, size,
97 		       "MicroBlaze @ %uMHz, Rev: %s, FPGA family: %s",
98 		       cpu_freq_mhz, cpu_ver, fpga_family);
99 	if (ret < 0)
100 		return ret;
101 
102 	return (ret >= size) ? -ENOSPC : 0;
103 }
104 
microblaze_cpu_get_info(const struct udevice * dev,struct cpu_info * info)105 static int microblaze_cpu_get_info(const struct udevice *dev,
106 				   struct cpu_info *info)
107 {
108 	struct microblaze_cpuinfo *ci = gd_cpuinfo();
109 
110 	info->cpu_freq = ci->cpu_freq;
111 	info->address_width = ci->addr_size;
112 
113 	if (ci->icache_size || ci->dcache_size)
114 		info->features |= BIT(CPU_FEAT_L1_CACHE);
115 
116 	if (ci->use_mmu)
117 		info->features |= BIT(CPU_FEAT_MMU);
118 
119 	return 0;
120 }
121 
microblaze_cpu_get_count(const struct udevice * dev)122 static int microblaze_cpu_get_count(const struct udevice *dev)
123 {
124 	return 1;
125 }
126 
127 static const struct cpu_ops microblaze_cpu_ops = {
128 	.get_desc	= microblaze_cpu_get_desc,
129 	.get_info	= microblaze_cpu_get_info,
130 	.get_count	= microblaze_cpu_get_count,
131 };
132 
133 static const struct udevice_id microblaze_cpu_ids[] = {
134 	{ .compatible = "xlnx,microblaze-11.0" },
135 	{ .compatible = "xlnx,microblaze-10.0" },
136 	{ .compatible = "xlnx,microblaze-9.6" },
137 	{ .compatible = "xlnx,microblaze-9.5" },
138 	{ .compatible = "xlnx,microblaze-9.4" },
139 	{ .compatible = "xlnx,microblaze-9.3" },
140 	{ .compatible = "xlnx,microblaze-9.2" },
141 	{ .compatible = "xlnx,microblaze-9.1" },
142 	{ .compatible = "xlnx,microblaze-9.0" },
143 	{ .compatible = "xlnx,microblaze-8.50.c" },
144 	{ .compatible = "xlnx,microblaze-8.50.b" },
145 	{ .compatible = "xlnx,microblaze-8.50.a" },
146 	{ .compatible = "xlnx,microblaze-8.40.b" },
147 	{ .compatible = "xlnx,microblaze-8.40.a" },
148 	{ .compatible = "xlnx,microblaze-8.30.a" },
149 	{ .compatible = "xlnx,microblaze-8.20.b" },
150 	{ .compatible = "xlnx,microblaze-8.20.a" },
151 	{ .compatible = "xlnx,microblaze-8.10.a" },
152 	{ .compatible = "xlnx,microblaze-8.00.b" },
153 	{ .compatible = "xlnx,microblaze-8.00.a" },
154 	{ .compatible = "xlnx,microblaze-7.30.b" },
155 	{ .compatible = "xlnx,microblaze-7.30.a" },
156 	{ .compatible = "xlnx,microblaze-7.20.d" },
157 	{ .compatible = "xlnx,microblaze-7.20.c" },
158 	{ .compatible = "xlnx,microblaze-7.20.b" },
159 	{ .compatible = "xlnx,microblaze-7.20.a" },
160 	{ .compatible = "xlnx,microblaze-7.10.d" },
161 	{ .compatible = "xlnx,microblaze-7.10.c" },
162 	{ .compatible = "xlnx,microblaze-7.10.b" },
163 	{ .compatible = "xlnx,microblaze-7.10.a" },
164 	{ .compatible = "xlnx,microblaze-7.00.b" },
165 	{ .compatible = "xlnx,microblaze-7.00.a" },
166 	{ .compatible = "xlnx,microblaze-6.00.b" },
167 	{ .compatible = "xlnx,microblaze-6.00.a" },
168 	{ .compatible = "xlnx,microblaze-5.00.c" },
169 	{ .compatible = "xlnx,microblaze-5.00.b" },
170 	{ .compatible = "xlnx,microblaze-5.00.a" },
171 	{ }
172 };
173 
174 U_BOOT_DRIVER(microblaze_cpu) = {
175 	.name		= "microblaze_cpu",
176 	.id		= UCLASS_CPU,
177 	.of_match	= microblaze_cpu_ids,
178 	.probe		= microblaze_cpu_probe,
179 	.ops		= &microblaze_cpu_ops,
180 	.flags		= DM_FLAG_PRE_RELOC,
181 };
182