1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2009
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * Changes for multibus/multiadapter I2C support.
6 *
7 * (C) Copyright 2001, 2002
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 *
10 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
11 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
12 * Neil Russell.
13 *
14 * NOTE: This driver should be converted to driver model before June 2017.
15 * Please see doc/driver-model/i2c-howto.rst for instructions.
16 */
17
18 #include <config.h>
19 #if defined(CONFIG_AT91FAMILY)
20 #include <asm/io.h>
21 #include <asm/arch/hardware.h>
22 #include <asm/arch/at91_pio.h>
23 #ifdef CONFIG_ATMEL_LEGACY
24 #include <asm/arch/gpio.h>
25 #endif
26 #endif
27 #include <i2c.h>
28 #include <asm/global_data.h>
29 #include <linux/delay.h>
30
31 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
32 # include <asm/gpio.h>
33
34 # ifndef I2C_GPIO_SYNC
35 # define I2C_GPIO_SYNC
36 # endif
37
38 # ifndef I2C_INIT
39 # define I2C_INIT \
40 do { \
41 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
42 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
43 } while (0)
44 # endif
45
46 # ifndef I2C_ACTIVE
47 # define I2C_ACTIVE do { } while (0)
48 # endif
49
50 # ifndef I2C_TRISTATE
51 # define I2C_TRISTATE do { } while (0)
52 # endif
53
54 # ifndef I2C_READ
55 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
56 # endif
57
58 # ifndef I2C_SDA
59 # define I2C_SDA(bit) \
60 do { \
61 if (bit) \
62 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
63 else \
64 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
65 I2C_GPIO_SYNC; \
66 } while (0)
67 # endif
68
69 # ifndef I2C_SCL
70 # define I2C_SCL(bit) \
71 do { \
72 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
73 I2C_GPIO_SYNC; \
74 } while (0)
75 # endif
76
77 # ifndef I2C_DELAY
78 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
79 # endif
80
81 #endif
82
83 /* #define DEBUG_I2C */
84
85 DECLARE_GLOBAL_DATA_PTR;
86
87 #ifndef I2C_SOFT_DECLARATIONS
88 # define I2C_SOFT_DECLARATIONS
89 #endif
90
91 /*-----------------------------------------------------------------------
92 * Definitions
93 */
94 #define RETRIES 0
95
96 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
97 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
98
99 #ifdef DEBUG_I2C
100 #define PRINTD(fmt,args...) do { \
101 printf (fmt ,##args); \
102 } while (0)
103 #else
104 #define PRINTD(fmt,args...)
105 #endif
106
107 /*-----------------------------------------------------------------------
108 * Local functions
109 */
110 static void send_reset (void);
111 static void send_start (void);
112 static void send_stop (void);
113 static void send_ack (int);
114 static int write_byte (uchar byte);
115 static uchar read_byte (int);
116
117 /*-----------------------------------------------------------------------
118 * Send a reset sequence consisting of 9 clocks with the data signal high
119 * to clock any confused device back into an idle state. Also send a
120 * <stop> at the end of the sequence for belts & suspenders.
121 */
send_reset(void)122 static void send_reset(void)
123 {
124 I2C_SOFT_DECLARATIONS /* intentional without ';' */
125 int j;
126
127 I2C_SCL(1);
128 I2C_SDA(1);
129 #ifdef I2C_INIT
130 I2C_INIT;
131 #endif
132 I2C_TRISTATE;
133 for(j = 0; j < 9; j++) {
134 I2C_SCL(0);
135 I2C_DELAY;
136 I2C_DELAY;
137 I2C_SCL(1);
138 I2C_DELAY;
139 I2C_DELAY;
140 }
141 send_stop();
142 I2C_TRISTATE;
143 }
144
145 /*-----------------------------------------------------------------------
146 * START: High -> Low on SDA while SCL is High
147 */
send_start(void)148 static void send_start(void)
149 {
150 I2C_SOFT_DECLARATIONS /* intentional without ';' */
151
152 I2C_DELAY;
153 I2C_SDA(1);
154 I2C_ACTIVE;
155 I2C_DELAY;
156 I2C_SCL(1);
157 I2C_DELAY;
158 I2C_SDA(0);
159 I2C_DELAY;
160 }
161
162 /*-----------------------------------------------------------------------
163 * STOP: Low -> High on SDA while SCL is High
164 */
send_stop(void)165 static void send_stop(void)
166 {
167 I2C_SOFT_DECLARATIONS /* intentional without ';' */
168
169 I2C_SCL(0);
170 I2C_DELAY;
171 I2C_SDA(0);
172 I2C_ACTIVE;
173 I2C_DELAY;
174 I2C_SCL(1);
175 I2C_DELAY;
176 I2C_SDA(1);
177 I2C_DELAY;
178 I2C_TRISTATE;
179 }
180
181 /*-----------------------------------------------------------------------
182 * ack should be I2C_ACK or I2C_NOACK
183 */
send_ack(int ack)184 static void send_ack(int ack)
185 {
186 I2C_SOFT_DECLARATIONS /* intentional without ';' */
187
188 I2C_SCL(0);
189 I2C_DELAY;
190 I2C_ACTIVE;
191 I2C_SDA(ack);
192 I2C_DELAY;
193 I2C_SCL(1);
194 I2C_DELAY;
195 I2C_DELAY;
196 I2C_SCL(0);
197 I2C_DELAY;
198 }
199
200 /*-----------------------------------------------------------------------
201 * Send 8 bits and look for an acknowledgement.
202 */
write_byte(uchar data)203 static int write_byte(uchar data)
204 {
205 I2C_SOFT_DECLARATIONS /* intentional without ';' */
206 int j;
207 int nack;
208
209 I2C_ACTIVE;
210 for(j = 0; j < 8; j++) {
211 I2C_SCL(0);
212 I2C_DELAY;
213 I2C_SDA(data & 0x80);
214 I2C_DELAY;
215 I2C_SCL(1);
216 I2C_DELAY;
217 I2C_DELAY;
218
219 data <<= 1;
220 }
221
222 /*
223 * Look for an <ACK>(negative logic) and return it.
224 */
225 I2C_SCL(0);
226 I2C_DELAY;
227 I2C_SDA(1);
228 I2C_TRISTATE;
229 I2C_DELAY;
230 I2C_SCL(1);
231 I2C_DELAY;
232 I2C_DELAY;
233 nack = I2C_READ;
234 I2C_SCL(0);
235 I2C_DELAY;
236 I2C_ACTIVE;
237
238 return(nack); /* not a nack is an ack */
239 }
240
241 /*-----------------------------------------------------------------------
242 * if ack == I2C_ACK, ACK the byte so can continue reading, else
243 * send I2C_NOACK to end the read.
244 */
read_byte(int ack)245 static uchar read_byte(int ack)
246 {
247 I2C_SOFT_DECLARATIONS /* intentional without ';' */
248 int data;
249 int j;
250
251 /*
252 * Read 8 bits, MSB first.
253 */
254 I2C_TRISTATE;
255 I2C_SDA(1);
256 data = 0;
257 for(j = 0; j < 8; j++) {
258 I2C_SCL(0);
259 I2C_DELAY;
260 I2C_SCL(1);
261 I2C_DELAY;
262 data <<= 1;
263 data |= I2C_READ;
264 I2C_DELAY;
265 }
266 send_ack(ack);
267
268 return(data);
269 }
270
271 /*-----------------------------------------------------------------------
272 * Initialization
273 */
soft_i2c_init(struct i2c_adapter * adap,int speed,int slaveaddr)274 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
275 {
276 /*
277 * WARNING: Do NOT save speed in a static variable: if the
278 * I2C routines are called before RAM is initialized (to read
279 * the DIMM SPD, for instance), RAM won't be usable and your
280 * system will crash.
281 */
282 send_reset ();
283 }
284
285 /*-----------------------------------------------------------------------
286 * Probe to see if a chip is present. Also good for checking for the
287 * completion of EEPROM writes since the chip stops responding until
288 * the write completes (typically 10mSec).
289 */
soft_i2c_probe(struct i2c_adapter * adap,uint8_t addr)290 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
291 {
292 int rc;
293
294 /*
295 * perform 1 byte write transaction with just address byte
296 * (fake write)
297 */
298 send_start();
299 rc = write_byte ((addr << 1) | 0);
300 send_stop();
301
302 return (rc ? 1 : 0);
303 }
304
305 /*-----------------------------------------------------------------------
306 * Read bytes
307 */
soft_i2c_read(struct i2c_adapter * adap,uchar chip,uint addr,int alen,uchar * buffer,int len)308 static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
309 int alen, uchar *buffer, int len)
310 {
311 int shift;
312 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
313 chip, addr, alen, buffer, len);
314
315 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
316 /*
317 * EEPROM chips that implement "address overflow" are ones
318 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
319 * address and the extra bits end up in the "chip address"
320 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
321 * four 256 byte chips.
322 *
323 * Note that we consider the length of the address field to
324 * still be one byte because the extra address bits are
325 * hidden in the chip address.
326 */
327 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
328
329 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
330 chip, addr);
331 #endif
332
333 /*
334 * Do the addressing portion of a write cycle to set the
335 * chip's address pointer. If the address length is zero,
336 * don't do the normal write cycle to set the address pointer,
337 * there is no address pointer in this chip.
338 */
339 send_start();
340 if(alen > 0) {
341 if(write_byte(chip << 1)) { /* write cycle */
342 send_stop();
343 PRINTD("i2c_read, no chip responded %02X\n", chip);
344 return(1);
345 }
346 shift = (alen-1) * 8;
347 while(alen-- > 0) {
348 if(write_byte(addr >> shift)) {
349 PRINTD("i2c_read, address not <ACK>ed\n");
350 return(1);
351 }
352 shift -= 8;
353 }
354
355 /* Some I2C chips need a stop/start sequence here,
356 * other chips don't work with a full stop and need
357 * only a start. Default behaviour is to send the
358 * stop/start sequence.
359 */
360 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
361 send_start();
362 #else
363 send_stop();
364 send_start();
365 #endif
366 }
367 /*
368 * Send the chip address again, this time for a read cycle.
369 * Then read the data. On the last byte, we do a NACK instead
370 * of an ACK(len == 0) to terminate the read.
371 */
372 write_byte((chip << 1) | 1); /* read cycle */
373 while(len-- > 0) {
374 *buffer++ = read_byte(len == 0);
375 }
376 send_stop();
377 return(0);
378 }
379
380 /*-----------------------------------------------------------------------
381 * Write bytes
382 */
soft_i2c_write(struct i2c_adapter * adap,uchar chip,uint addr,int alen,uchar * buffer,int len)383 static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
384 int alen, uchar *buffer, int len)
385 {
386 int shift, failures = 0;
387
388 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
389 chip, addr, alen, buffer, len);
390
391 send_start();
392 if(write_byte(chip << 1)) { /* write cycle */
393 send_stop();
394 PRINTD("i2c_write, no chip responded %02X\n", chip);
395 return(1);
396 }
397 shift = (alen-1) * 8;
398 while(alen-- > 0) {
399 if(write_byte(addr >> shift)) {
400 PRINTD("i2c_write, address not <ACK>ed\n");
401 return(1);
402 }
403 shift -= 8;
404 }
405
406 while(len-- > 0) {
407 if(write_byte(*buffer++)) {
408 failures++;
409 }
410 }
411 send_stop();
412 return(failures);
413 }
414
415 /*
416 * Register soft i2c adapters
417 */
418 U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
419 soft_i2c_read, soft_i2c_write, NULL,
420 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
421 0)
422