1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Xilinx ethernet phy reset driver
4 *
5 * Copyright (C) 2022 Xilinx, Inc.
6 */
7
8 #include <dm/device_compat.h>
9 #include <dm/device-internal.h>
10 #include <dm/lists.h>
11 #include <phy.h>
12 #include <linux/delay.h>
13 #include <asm/gpio.h>
14
phy_connect_phy_id(struct mii_dev * bus,struct udevice * dev,int phyaddr)15 struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
16 int phyaddr)
17 {
18 struct phy_device *phydev;
19 struct ofnode_phandle_args phandle_args;
20 const char *node_name;
21 struct udevice *pdev;
22 u16 vendor, device;
23 ofnode node;
24 u32 id;
25 int ret;
26
27 if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
28 &phandle_args))
29 return NULL;
30
31 if (!ofnode_valid(phandle_args.node))
32 return NULL;
33
34 node = phandle_args.node;
35
36 ret = ofnode_read_eth_phy_id(node, &vendor, &device);
37 if (ret) {
38 debug("Failed to read eth PHY id, err: %d\n", ret);
39 return NULL;
40 }
41
42 ret = phy_gpio_reset(dev);
43 if (ret)
44 return NULL;
45
46 if (phyaddr == -1)
47 phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1);
48
49 id = vendor << 16 | device;
50 phydev = phy_device_create(bus, phyaddr, id, false);
51 if (phydev)
52 phydev->node = node;
53
54 if (IS_ENABLED(CONFIG_DM_ETH_PHY) && ofnode_valid(node)) {
55 node_name = ofnode_get_name(node);
56 ret = device_bind_driver_to_node(dev, "eth_phy_generic_drv",
57 node_name, node,
58 &pdev);
59 if (ret)
60 return NULL;
61
62 ret = device_probe(pdev);
63 if (ret)
64 return NULL;
65 }
66
67 return phydev;
68 }
69