1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * TI Generic PHY Init to register any TI Ethernet PHYs
4 *
5 * Author: Dan Murphy <dmurphy@ti.com>
6 *
7 * Copyright (C) 2019-20 Texas Instruments Inc.
8 */
9
10 #include <phy.h>
11 #include "ti_phy_init.h"
12
13 #define DP83822_DEVADDR 0x1f
14
15 #define MII_DP83822_RCSR 0x17
16
17 /* RCSR bits */
18 #define DP83822_RX_CLK_SHIFT BIT(12)
19 #define DP83822_TX_CLK_SHIFT BIT(11)
20
21 /* DP83822 specific RGMII RX/TX delay configuration. */
dp83822_config(struct phy_device * phydev)22 static int dp83822_config(struct phy_device *phydev)
23 {
24 ofnode node = phy_get_ofnode(phydev);
25 u32 rgmii_delay = 0;
26 u32 rx_delay = 0;
27 u32 tx_delay = 0;
28 int ret;
29
30 ret = ofnode_read_u32(node, "rx-internal-delay-ps", &rx_delay);
31 if (ret) {
32 rx_delay = phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
33 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID;
34 }
35
36 ret = ofnode_read_u32(node, "tx-internal-delay-ps", &tx_delay);
37 if (ret) {
38 tx_delay = phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
39 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID;
40 }
41
42 /* Bit set means Receive path internal clock shift is ENABLED */
43 if (rx_delay)
44 rgmii_delay |= DP83822_RX_CLK_SHIFT;
45
46 /* Bit set means Transmit path internal clock shift is DISABLED */
47 if (!tx_delay)
48 rgmii_delay |= DP83822_TX_CLK_SHIFT;
49
50 ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
51 DP83822_RX_CLK_SHIFT | DP83822_TX_CLK_SHIFT,
52 rgmii_delay);
53 if (ret)
54 return ret;
55
56 return genphy_config_aneg(phydev);
57 }
58
59 U_BOOT_PHY_DRIVER(dp83822) = {
60 .name = "TI DP83822",
61 .uid = 0x2000a240,
62 .mask = 0xfffffff0,
63 .features = PHY_BASIC_FEATURES,
64 .config = &dp83822_config,
65 .startup = &genphy_startup,
66 .shutdown = &genphy_shutdown,
67 };
68
69 U_BOOT_PHY_DRIVER(dp83826nc) = {
70 .name = "TI DP83826NC",
71 .uid = 0x2000a110,
72 .mask = 0xfffffff0,
73 .features = PHY_BASIC_FEATURES,
74 .config = &genphy_config_aneg,
75 .startup = &genphy_startup,
76 .shutdown = &genphy_shutdown,
77 };
78
79 U_BOOT_PHY_DRIVER(dp83826c) = {
80 .name = "TI DP83826C",
81 .uid = 0x2000a130,
82 .mask = 0xfffffff0,
83 .features = PHY_BASIC_FEATURES,
84 .config = &genphy_config_aneg,
85 .startup = &genphy_startup,
86 .shutdown = &genphy_shutdown,
87 };
88
89 U_BOOT_PHY_DRIVER(dp83825s) = {
90 .name = "TI DP83825S",
91 .uid = 0x2000a140,
92 .mask = 0xfffffff0,
93 .features = PHY_BASIC_FEATURES,
94 .config = &genphy_config_aneg,
95 .startup = &genphy_startup,
96 .shutdown = &genphy_shutdown,
97 };
98
99 U_BOOT_PHY_DRIVER(dp83825i) = {
100 .name = "TI DP83825I",
101 .uid = 0x2000a150,
102 .mask = 0xfffffff0,
103 .features = PHY_BASIC_FEATURES,
104 .config = &genphy_config_aneg,
105 .startup = &genphy_startup,
106 .shutdown = &genphy_shutdown,
107 };
108
109 U_BOOT_PHY_DRIVER(dp83825m) = {
110 .name = "TI DP83825M",
111 .uid = 0x2000a160,
112 .mask = 0xfffffff0,
113 .features = PHY_BASIC_FEATURES,
114 .config = &genphy_config_aneg,
115 .startup = &genphy_startup,
116 .shutdown = &genphy_shutdown,
117 };
118
119 U_BOOT_PHY_DRIVER(dp83825cs) = {
120 .name = "TI DP83825CS",
121 .uid = 0x2000a170,
122 .mask = 0xfffffff0,
123 .features = PHY_BASIC_FEATURES,
124 .config = &genphy_config_aneg,
125 .startup = &genphy_startup,
126 .shutdown = &genphy_shutdown,
127 };
128