1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015-2016 Marvell International Ltd.
4 */
5
6 #include <log.h>
7 #include <asm/io.h>
8
9 #include "comphy_core.h"
10
11 /*
12 * comphy_mux_check_config()
13 * description: this function passes over the COMPHY lanes and check if the type
14 * is valid for specific lane. If the type is not valid,
15 * the function update the struct and set the type of the lane as
16 * COMPHY_TYPE_UNCONNECTED
17 */
comphy_mux_check_config(struct comphy_mux_data * mux_data,struct comphy_map * comphy_map_data,int comphy_max_lanes)18 static void comphy_mux_check_config(struct comphy_mux_data *mux_data,
19 struct comphy_map *comphy_map_data, int comphy_max_lanes)
20 {
21 struct comphy_mux_options *mux_opt;
22 int lane, opt, valid;
23
24 debug_enter();
25
26 for (lane = 0; lane < comphy_max_lanes;
27 lane++, comphy_map_data++, mux_data++) {
28 /* Don't check ignored COMPHYs */
29 if (comphy_map_data->type == COMPHY_TYPE_IGNORE)
30 continue;
31
32 mux_opt = mux_data->mux_values;
33 for (opt = 0, valid = 0; opt < mux_data->max_lane_values;
34 opt++, mux_opt++) {
35 if (mux_opt->type == comphy_map_data->type) {
36 valid = 1;
37 break;
38 }
39 }
40 if (valid == 0) {
41 debug("lane number %d, had invalid type %d\n",
42 lane, comphy_map_data->type);
43 debug("set lane %d as type %d\n", lane,
44 COMPHY_TYPE_UNCONNECTED);
45 comphy_map_data->type = COMPHY_TYPE_UNCONNECTED;
46 } else {
47 debug("lane number %d, has type %d\n",
48 lane, comphy_map_data->type);
49 }
50 }
51
52 debug_exit();
53 }
54
comphy_mux_get_mux_value(struct comphy_mux_data * mux_data,u32 type,int lane)55 static u32 comphy_mux_get_mux_value(struct comphy_mux_data *mux_data,
56 u32 type, int lane)
57 {
58 struct comphy_mux_options *mux_opt;
59 int opt;
60 u32 value = 0;
61
62 debug_enter();
63
64 mux_opt = mux_data->mux_values;
65 for (opt = 0 ; opt < mux_data->max_lane_values; opt++, mux_opt++) {
66 if (mux_opt->type == type) {
67 value = mux_opt->mux_value;
68 break;
69 }
70 }
71
72 debug_exit();
73
74 return value;
75 }
76
comphy_mux_reg_write(struct comphy_mux_data * mux_data,struct comphy_map * comphy_map_data,int comphy_max_lanes,void __iomem * selector_base,const fdt32_t * mux_lane_order,u32 bitcount)77 static void comphy_mux_reg_write(struct comphy_mux_data *mux_data,
78 struct comphy_map *comphy_map_data,
79 int comphy_max_lanes,
80 void __iomem *selector_base,
81 const fdt32_t *mux_lane_order, u32 bitcount)
82 {
83 u32 lane, value, offset, mask;
84
85 debug_enter();
86
87 for (lane = 0; lane < comphy_max_lanes;
88 lane++, comphy_map_data++, mux_data++) {
89 if (comphy_map_data->type == COMPHY_TYPE_IGNORE)
90 continue;
91
92 /*
93 * if the order of nodes in selector base register is
94 * nontrivial, use mapping from mux_lane_order
95 */
96 if (mux_lane_order)
97 offset = fdt32_to_cpu(mux_lane_order[lane]) * bitcount;
98 else
99 offset = lane * bitcount;
100
101 mask = (((1 << bitcount) - 1) << offset);
102 value = (comphy_mux_get_mux_value(mux_data,
103 comphy_map_data->type,
104 lane) << offset);
105 reg_set(selector_base, value, mask);
106 }
107
108 debug_exit();
109 }
110
comphy_mux_init(struct chip_serdes_phy_config * chip_cfg,struct comphy_map * comphy_map_data,void __iomem * selector_base)111 void comphy_mux_init(struct chip_serdes_phy_config *chip_cfg,
112 struct comphy_map *comphy_map_data,
113 void __iomem *selector_base)
114 {
115 struct comphy_mux_data *mux_data;
116 const fdt32_t *mux_lane_order;
117 u32 mux_bitcount;
118 u32 comphy_max_lanes;
119
120 debug_enter();
121
122 comphy_max_lanes = chip_cfg->comphy_lanes_count;
123 mux_data = chip_cfg->mux_data;
124 mux_lane_order = chip_cfg->comphy_mux_lane_order;
125 mux_bitcount = chip_cfg->comphy_mux_bitcount;
126
127 /* check if the configuration is valid */
128 comphy_mux_check_config(mux_data, comphy_map_data, comphy_max_lanes);
129 /* Init COMPHY selectors */
130 comphy_mux_reg_write(mux_data, comphy_map_data, comphy_max_lanes,
131 selector_base, mux_lane_order, mux_bitcount);
132
133 debug_exit();
134 }
135